Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2005
06/16/2005WO2005013325A3 System for processing a treatment object
06/16/2005WO2005006406A3 Methods of incorporating germanium within cmos process
06/16/2005WO2004107422A3 Plating apparatus and plating method
06/16/2005WO2004105119A3 Method for the production of a chip arrangement and varnish comprising magnetically conductive particles for electrically contacting the chip
06/16/2005WO2004105097A3 Fabrication of p-type group ii-vi semiconductors
06/16/2005WO2004102076A3 Multi-zone ceramic heating system and method of manufacture thereof
06/16/2005WO2004100223A3 Semiconductor fabrication process with asymmetrical conductive spacers
06/16/2005WO2004093100A3 Method for producing soldering globules on an electrical component
06/16/2005WO2004088717A3 Superjunction device and method of manufacture therefore
06/16/2005WO2004084268A3 Epitaxial semiconductor deposition methods and structures
06/16/2005WO2004081994A3 Substrate support lift mechanism
06/16/2005WO2004077512A3 Universal substrate holder for treating objects in fluids
06/16/2005WO2004071153A3 Method of forming sub-micron-size structures over a substrate
06/16/2005WO2004052785A3 High purity nickel/vanadium sputtering components; and methods of making sputtering components
06/16/2005WO2004019079A3 Continuous direct-write optical lithography
06/16/2005WO2002016973A3 Electronic and optical devices and methods of forming these devices
06/16/2005WO2001090434A3 Tuning electrodes used in a reactor for electrochemically processing a microelectronic workpiece
06/16/2005US20050132322 Mask evaluating method, mask evaluating system, method of manufacturing mask and computer program product
06/16/2005US20050132314 Circuits and methods for matching device characteristics for analog and mixed-signal designs
06/16/2005US20050132308 Method for calculating high-resolution wafer parameter profiles
06/16/2005US20050132306 Characterization and reduction of variation for integrated circuits
06/16/2005US20050132254 Test circuit inserting method and apparatus for a semiconductor integrated circuit
06/16/2005US20050131190 Multi-functional linear siloxane compound, a siloxane polymer prepared from the compound, and a process for forming a dielectric film by using the polymer
06/16/2005US20050131184 Preparation process of copolymer for semiconductor lithography and a copolymer for semiconductor lithography available by this process
06/16/2005US20050131106 Combinations of resin compositions and methods of use thereof
06/16/2005US20050130844 Metal oxide semiconductor thin film and method of producing the same
06/16/2005US20050130617 Variable-gain low noise amplifier for digital terrestrial applications
06/16/2005US20050130566 Slurry distributor for chemical mechanical polishing apparatus and method of using the same
06/16/2005US20050130562 Polishing apparatus and method for detecting foreign matter on polishing surface
06/16/2005US20050130561 Polishing method and apparatus
06/16/2005US20050130497 Stress dispersing lead and stress dispersing method of lead
06/16/2005US20050130454 Method for improving transistor performance through reducing the salicide interface resistance
06/16/2005US20050130453 Substrate processing apparatus and management method
06/16/2005US20050130452 Production method for silicon wafers and silicon wafer
06/16/2005US20050130451 Method for processing a wafer and apparatus for performing the same
06/16/2005US20050130450 Device for producing inductively coupled plasma and method thereof
06/16/2005US20050130449 Method of forming an oxide layer using a mixture of a supercritical state fluid and an oxidizing agent
06/16/2005US20050130448 Method of forming a silicon oxynitride layer
06/16/2005US20050130445 Substrate processing method and substrate processing apparatus
06/16/2005US20050130444 Photosensitive lacquer for providing a coating on a semiconductor substrate or a mask
06/16/2005US20050130443 Process for laminating a dielectric layer onto a semiconductor
06/16/2005US20050130442 Method for fabricating transistor gate structures and gate dielectrics thereof
06/16/2005US20050130441 Semiconductor devices and methods of manufacturing the same
06/16/2005US20050130440 Low dielectric (low k) barrier films with oxygen doping by plasma-enhanced chemical vapor deposition (PECVD)
06/16/2005US20050130439 Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device
06/16/2005US20050130438 Method of fabricating a dielectric layer for a semiconductor structure
06/16/2005US20050130437 Dry film remove pre-filter system
06/16/2005US20050130436 Method for etching of a silicon substrate and etching apparatus
06/16/2005US20050130435 Method of preventing damage to porous low-k materials during resist stripping
06/16/2005US20050130434 Method of surface pretreatment before selective epitaxial growth
06/16/2005US20050130433 Method of forming isolation film in semiconductor device
06/16/2005US20050130432 Method for improving transistor leakage current uniformity
06/16/2005US20050130431 Method for making a package substrate without etching metal layer on side walls of die-cavity
06/16/2005US20050130430 Method for chemical mechanical polishing for fabricating semiconductor device
06/16/2005US20050130429 Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials
06/16/2005US20050130428 Slurry compositions and CMP methods using the same
06/16/2005US20050130427 Method of forming thin film for improved productivity
06/16/2005US20050130424 Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
06/16/2005US20050130423 Method for forming inductor in semiconductor device
06/16/2005US20050130422 Method for patterning films
06/16/2005US20050130421 Method for removing a resist mask with high selectivity to a carbon hard mask used for semiconductor structuring
06/16/2005US20050130420 Cleaning method using ozone DI process
06/16/2005US20050130419 Method for reducing corrosion of metal surfaces during semiconductor processing
06/16/2005US20050130418 Semiconductor device and manufacturing method therefor
06/16/2005US20050130417 Method for fabricating epitaxial cobalt-disilicide layers using cobalt-nitride thin film
06/16/2005US20050130415 Method and apparatus for material deposition
06/16/2005US20050130414 Methods for forming small features in microelectronic devices using sacrificial layers and structures fabricated by same
06/16/2005US20050130413 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device
06/16/2005US20050130412 Method for forming metal contact in semiconductor device
06/16/2005US20050130411 Method for forming openings in low-k dielectric layers
06/16/2005US20050130410 Contact hole printing by packing and unpacking
06/16/2005US20050130409 Controlled dry etch of a film
06/16/2005US20050130408 Method for forming metal wiring of semiconductor device
06/16/2005US20050130407 Dual damascene process for forming a multi-layer low-k dielectric interconnect
06/16/2005US20050130406 Method of manufacturing an electronic device
06/16/2005US20050130405 Method of making a semiconductor device having a low k dielectric
06/16/2005US20050130404 Methods and apparatus for e-beam treatment used to fabricate integrated circuit devices
06/16/2005US20050130403 Stacked local interconnect structure and method of fabricating same
06/16/2005US20050130402 Semiconductor local interconnect and contact
06/16/2005US20050130401 Methods of forming metal interconnection lines in semiconductor devices
06/16/2005US20050130399 Method of forming metal line in semiconductor device
06/16/2005US20050130398 Elimination of the fast-erase phenomena in flash memory
06/16/2005US20050130397 Formation of layers on substrates
06/16/2005US20050130396 Method for activating P-type semiconductor layer
06/16/2005US20050130395 Doping method and semiconductor device using the same
06/16/2005US20050130394 Process for implementing oxygen into a silicon wafer having a region which is free of agglomerated intrinsic point defects
06/16/2005US20050130393 Method for improving the quality of heterostructure
06/16/2005US20050130392 Method of dicing a wafer
06/16/2005US20050130391 Method for manufacturing semiconductor device
06/16/2005US20050130390 Semiconductor substrate assemblies and methods for preparing and dicing the same
06/16/2005US20050130389 Semiconductor device and manufacturing method thereof
06/16/2005US20050130388 Method for forming mos transistor
06/16/2005US20050130387 Shallow trench isolation fill by liquid phase deposition of SiO2
06/16/2005US20050130385 Method of manufacturing a capacitor having improved capacitance and method of manufacturing a semiconductor device including the capacitor
06/16/2005US20050130384 Method for manufacturing resistor of a semiconductor device
06/16/2005US20050130383 Silicide resistor in beol layer of semiconductor device and method
06/16/2005US20050130382 Method and apparatus for fabricating semiconductor device
06/16/2005US20050130381 Methods for fabricating semiconductor devices
06/16/2005US20050130380 Semiconductor device structures including metal silicide interconnects and dielectric layers at substantially the same fabrication level
06/16/2005US20050130379 Method and structure to decrease area capacitance within a buried insulator device
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