Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2005
06/21/2005US6909140 Flash memory with protruded floating gate
06/21/2005US6909139 One transistor flash memory cell
06/21/2005US6909138 P-channel dynamic flash memory cells with ultrathin tunnel oxides
06/21/2005US6909137 Method of creating deep trench capacitor using a P+ metal electrode
06/21/2005US6909136 Trench-capacitor DRAM cell having a folded gate conductor
06/21/2005US6909135 Semiconductor memory device
06/21/2005US6909134 Ferroelectric memory device using via etch-stop layer and method for manufacturing the same
06/21/2005US6909133 Method for manufacturing semiconductor integrated circuit device
06/21/2005US6909132 Semiconductor device and its manufacturing method
06/21/2005US6909131 Word line strap layout structure
06/21/2005US6909130 Magnetic random access memory device having high-heat disturbance resistance and high write efficiency
06/21/2005US6909129 Magnetic random access memory
06/21/2005US6909128 Capacitance reduction by tunnel formation for use with a semiconductor device
06/21/2005US6909125 Implant-controlled-channel vertical JFET
06/21/2005US6909122 Semiconductor light-emitting device with isolation trenches, and method of fabricating same
06/21/2005US6909119 Low temperature formation of backside ohmic contacts for vertical devices
06/21/2005US6909118 Semiconductor device and method of fabricating the same
06/21/2005US6909117 Semiconductor display device and manufacturing method thereof
06/21/2005US6909116 Semiconductor device
06/21/2005US6909115 Semiconductor device applying to the crystalline semiconductor film
06/21/2005US6909114 Semiconductor device having LDD regions
06/21/2005US6909113 Three-dimensional photonic band structures in solid materials
06/21/2005US6909110 Dual panel-type organic electroluminescent display device and method of fabricating the same
06/21/2005US6909107 Method for manufacturing sidewall contacts for a chalcogenide memory device
06/21/2005US6909103 Ion irradiation of a target at very high and very low kinetic ion energies
06/21/2005US6909100 Radiation detector assembly
06/21/2005US6909099 X-ray detector and method of fabricating therefore
06/21/2005US6909092 Electron beam apparatus and device manufacturing method using same
06/21/2005US6909087 Method of processing a surface of a workpiece
06/21/2005US6909086 Neutral particle beam processing apparatus
06/21/2005US6909054 Multilayer printed wiring board and method for producing multilayer printed wiring board
06/21/2005US6908977 Siloxane-based resin and method of forming an insulating film between interconnect layers of a semiconductor device using the same
06/21/2005US6908969 Unsaturated compounds containing silane, electron donor and electron acceptor functionality
06/21/2005US6908957 Curable electron donor compounds
06/21/2005US6908892 Photoresist remover composition
06/21/2005US6908868 Gas passivation on nitride encapsulated devices
06/21/2005US6908867 Method of manufacturing a FeRAM with annealing process
06/21/2005US6908865 Method and apparatus for cleaning substrates
06/21/2005US6908864 Pressure control method and processing device
06/21/2005US6908863 Sacrificial dielectric planarization layer
06/21/2005US6908862 HDP-CVD dep/etch/dep process for improved deposition into high aspect ratio features
06/21/2005US6908861 Method for imprint lithography using an electric field
06/21/2005US6908860 Method for manufacturing semiconductor device and apparatus for manufacturing thereof
06/21/2005US6908859 Low leakage power transistor and method of forming
06/21/2005US6908858 Method of fabricating semiconductor device having opening filled up with filler
06/21/2005US6908857 Method of manufacturing semiconductor device
06/21/2005US6908856 Method for producing electrical through hole interconnects and devices made thereof
06/21/2005US6908854 Method of forming a dual-layer resist and application thereof
06/21/2005US6908853 Method of fabricating a semiconductor device having reduced contact resistance
06/21/2005US6908852 Method of forming an arc layer for a semiconductor device
06/21/2005US6908851 Corrosion resistance for copper interconnects
06/21/2005US6908850 Structure and method for silicided metal gate transistors
06/21/2005US6908849 High aspect ratio contact structure with reduced silicon consumption
06/21/2005US6908848 Method for forming an electrical interconnection providing improved surface morphology of tungsten
06/21/2005US6908847 Method of manufacturing a semiconductor device having an interconnect embedded in an insulating film
06/21/2005US6908846 Method and apparatus for detecting endpoint during plasma etching of thin films
06/21/2005US6908845 Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
06/21/2005US6908844 Metallization arrangement for semiconductor structure and corresponding fabrication method
06/21/2005US6908843 Method and system of wire bonding using interposer pads
06/21/2005US6908842 Bumping process
06/21/2005US6908841 Support structures for wirebond regions of contact pads over low modulus materials
06/21/2005US6908840 Method of filling bit line contact via
06/21/2005US6908839 Method of producing an imaging device
06/21/2005US6908838 Method and device for treating semiconductor substrates
06/21/2005US6908837 Method of manufacturing a semiconductor integrated circuit device including a gate electrode having a salicide layer thereon
06/21/2005US6908836 Method of implanting a substrate and an ion implanter for performing the method
06/21/2005US6908835 Method and system for providing a single-scan, continuous motion sequential lateral solidification
06/21/2005US6908834 Semiconductor device production method and semiconductor device
06/21/2005US6908833 Shallow self isolated doped implanted silicon process
06/21/2005US6908832 In situ plasma wafer bonding method
06/21/2005US6908831 Method for fabricating a semiconductor structure with an encapsulation of a filling which is used for filling trenches
06/21/2005US6908828 Support-integrated donor wafers for repeated thin donor layer separation
06/21/2005US6908827 Perovskite-type material forming methods, capacitor dielectric forming methods, and capacitor constructions
06/21/2005US6908826 Semiconductor device and method of fabricating the same
06/21/2005US6908825 Method of making an integrated circuit inductor wherein a plurality of apertures are formed beneath an inductive loop
06/21/2005US6908824 Self-aligned lateral heterojunction bipolar transistor
06/21/2005US6908823 Method of manufacturing a semiconductor device
06/21/2005US6908822 Semiconductor device having an insulating layer and method for forming
06/21/2005US6908820 Method of manufacturing semiconductor device
06/21/2005US6908819 Method of fabricating flat-cell mask read-only memory devices
06/21/2005US6908818 Contactless channel write/erase flash memory cell and its fabrication method
06/21/2005US6908817 Flash memory array with increased coupling between floating and control gates
06/21/2005US6908816 Method for forming a dielectric spacer in a non-volatile memory device
06/21/2005US6908815 Dual work function semiconductor structure with borderless contact and method of fabricating the same
06/21/2005US6908814 Process for a flash memory with high breakdown resistance between gate and contact
06/21/2005US6908813 Method of forming tiny silicon nitride spacer for flash EPROM by fully wet etching technology
06/21/2005US6908811 Ram
06/21/2005US6908810 Method of preventing threshold voltage of MOS transistor from being decreased by shallow trench isolation formation
06/21/2005US6908809 Embedded capacitors using conductor filled vias
06/21/2005US6908807 Methods of forming semiconductor constructions
06/21/2005US6908806 Gate metal recess for oxidation protection and parasitic capacitance reduction
06/21/2005US6908805 Method of manufacturing dual gate oxide film
06/21/2005US6908804 Bipolar transistor, semiconductor device and method of manufacturing same
06/21/2005US6908803 Methods for forming wordlines, transistor gates, and conductive interconnects, and wordline, transistor gate, and conductive interconnect structures
06/21/2005US6908802 Ferroelectric circuit element that can be fabricated at low temperatures and method for making the same
06/21/2005US6908801 Method of manufacturing semiconductor device
06/21/2005US6908800 Tunable sidewall spacer process for CMOS integrated circuits
06/21/2005US6908799 High electron mobility transistor and method of manufacturing the same
06/21/2005US6908798 Methods of making semiconductor-on-insulator thin film transistor constructions
06/21/2005US6908797 Method of manufacturing a semiconductor device
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