Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2005
12/08/2005WO2005116920A1 Secure electronic entity such as a passport
12/08/2005WO2005116776A1 Resin composition for forming fine pattern and method for forming fine pattern
12/08/2005WO2005116775A1 Pattern forming method, color filter manufacturing method, color filter, and liquid crystal display
12/08/2005WO2005116774A1 Pattern formation method
12/08/2005WO2005116770A1 Photosensitive polyimide precursor composition
12/08/2005WO2005116764A1 Positive photosensitive resin composition, and interlayer dielectrics and micro lenses made therefrom
12/08/2005WO2005116763A1 Method of forming graft pattern, graft pattern material, method of lithography, method of forming conductive pattern, conductive pattern, process for producing color filter, color filter and process for producing microlens
12/08/2005WO2005116762A1 Resist composition and method for forming resist pattern
12/08/2005WO2005116759A2 Cleaning a mask substrate
12/08/2005WO2005116758A2 Cleaning a mask substrate
12/08/2005WO2005116751A1 Wavelength converting optical system, laser light source, exposure apparatus, mask examining apparatus, and macromolecular crystal lens machining device
12/08/2005WO2005116745A1 Active matrix substrate, method for correcting a pixel deffect therein and manufacturing method thereof
12/08/2005WO2005116667A1 Probe
12/08/2005WO2005116577A1 Method of adjusting imaging optical system, imaging device, positional deviation detecting device, mark identifying device and edge position detectinc device
12/08/2005WO2005116487A1 Gravity compensation device
12/08/2005WO2005116307A1 Process for producing wafer of silicon carbide single-crystal
12/08/2005WO2005116304A2 In situ doped epitaxial films
12/08/2005WO2005116303A1 Method for electroplating bath chemistry control
12/08/2005WO2005116293A1 Thin film forming equipment and thin film forming method
12/08/2005WO2005116292A1 Material for chemical vapor deposition and thin film forming method
12/08/2005WO2005116152A1 Block copolymerized polyimide ink composition for printing
12/08/2005WO2005115933A1 Optical element forming mold and production method and reprodulction method therefor
12/08/2005WO2005115911A1 Nanotube position controlling method, nanotube position controlling flow path pattern and electronic element using nanotube
12/08/2005WO2005115689A1 Substrate peripheral portion measuring device and method, substrate peripheral portion polishing apparatus and method, and substrate rinsing apparatus and method
12/08/2005WO2005115104A2 Methods for stable and repeatable plasma ion implantation
12/08/2005WO2005098939A3 Combination insulator and organic semiconductor formed from self-assembling block co-polymers
12/08/2005WO2005097640A3 Method for reciprocating a workpiece through an ion beam
12/08/2005WO2005095679A3 Sequential lithographic methods to reduce stacking fault nucleation sites and structures having reduced stacking fault nucleation sites
12/08/2005WO2005091338A3 Dual doped polysilicon and silicon germanium etch
12/08/2005WO2005083780A3 Cmos silicide metal gate integration
12/08/2005WO2005081757A3 A novel thin laminate as embedded capacitance material in printed circuit boards
12/08/2005WO2005074451A3 Technique for perfecting the active regions of wide bandgap semiconductor nitride devices
12/08/2005WO2005072154A3 Vertical gate cmos with lithography-independent gate length
12/08/2005WO2005071738A3 Shallow trench isolation process and structure
12/08/2005WO2005067008A3 Method and system for coating polymer solution on a substrate in a solvent saturated chamber
12/08/2005WO2005043648A3 Synergetic sp-sp2-sp3 carbon materials and deposition methods thereof
12/08/2005WO2005043583A3 High-temperature attachment of organic molecules to substrates
12/08/2005WO2005027209A3 Multiple zone structure capable of light radiation annealing and method using said structure
12/08/2005WO2005001578A3 Developer composition for resists and method for formation of resist pattern
12/08/2005WO2004114366A3 Hdp-cvd multistep gapfill process
12/08/2005WO2004095545A8 Wafer carrier having improved processing characteristics
12/08/2005WO2004034423A3 Semiconductor photodetector with internal reflector
12/08/2005US20050273754 Pattern data correction method, pattern checking method, pattern check program, photo mask producing method, and semiconductor device manufacturing method
12/08/2005US20050273749 Structured ASIC device with configurable die size and selectable embedded functions
12/08/2005US20050273748 Local preferred direction routing
12/08/2005US20050273744 Ic tiling pattern method, ic so formed and analysis method
12/08/2005US20050273743 Net/wiring selection method, net selection method, wiring selection method, and delay improvement method
12/08/2005US20050273680 Semiconductor device having buffer layer pattern and method of forming same
12/08/2005US20050273309 Circuit simulation method, device model, and simulation circuit
12/08/2005US20050273192 Article to be processed having ID, and production method thereof
12/08/2005US20050273191 Small lot size lithography bays
12/08/2005US20050273190 Methods and apparatus for material control system interface
12/08/2005US20050272590 Silica glass containing TiO2 and process for its production
12/08/2005US20050272355 Carrier head for chemical mechanical polishing apparatus
12/08/2005US20050272351 Method and apparatus for cleaning mounting nozzle, and mounting machine
12/08/2005US20050272348 Polishing pad assembly, apparatus for polishing a wafer including the polishing pad assembly and method for polishing a wafer using the polishing pad assembly
12/08/2005US20050272346 Carrier head of chemical mechanical polishing apparatus having barriers dividing pressure chamber into a plurality of pressure zones
12/08/2005US20050272341 Method for fabricating a self-aligned nanocolumnar airbridge and structure produced thereby
12/08/2005US20050272274 Apparatus for forming a semiconductor thin film
12/08/2005US20050272273 Method and apparatus for electrostatically maintaining substrate flatness
12/08/2005US20050272272 Semiconductor device and method for manufacturing the same
12/08/2005US20050272270 Method for making a semiconductor device with a high-k gate dielectric and metal layers that meet at a P/N junction
12/08/2005US20050272269 Oxidizing method and oxidizing unit for object to be processed
12/08/2005US20050272268 Method of producing substrate having patterned organosilane layer and method of using the substrate having the patterned organosilane layer
12/08/2005US20050272267 Method suitable for batch ion etching of copper
12/08/2005US20050272266 Semiconductor device and its manufacturing method
12/08/2005US20050272265 Dual damascene integration structure and method for forming improved dual damascene integration structure
12/08/2005US20050272264 Coupling for corrugated cable conduits for enclosing cables
12/08/2005US20050272262 Methods of manufacturing semiconductor devices
12/08/2005US20050272261 Plasma chemical vapor deposition method and plasma chemical vapor deposition device
12/08/2005US20050272260 Novel device structure having enhanced surface adhesion and failure mode analysis
12/08/2005US20050272259 Method of pitch dimension shrinkage
12/08/2005US20050272258 Method of manufacturing a semiconductor device and semiconductor device
12/08/2005US20050272257 Semiconductor device with reduced contact resistance
12/08/2005US20050272256 Semiconductor device and fabricating method thereof
12/08/2005US20050272255 Method and structure for low k interlayer dielectric layer
12/08/2005US20050272254 Method of depositing low resistivity barrier layers for copper interconnects
12/08/2005US20050272253 Method for alloy-electroplating group IB metals with refractory metals for interconnections
12/08/2005US20050272252 Circuit device
12/08/2005US20050272251 Methods of fabricating integrated circuit devices including self-aligned contacts with increased alignment margin
12/08/2005US20050272250 Method of forming self-aligned contact and method of manufacturing semiconductor memory device by using the same
12/08/2005US20050272248 Low-k dielectric structure and method
12/08/2005US20050272247 Substrate processing method and fabrication process of a semiconductor device
12/08/2005US20050272246 Integrated capacitor for RF applications
12/08/2005US20050272245 Method for forming contact plug of semiconductor device
12/08/2005US20050272244 Method for manufacturing circuit element, method for manufacturing electronic element, circuit substrate, electronic device, and electro-optical apparatus
12/08/2005US20050272243 Method of manufacturing semiconductor device
12/08/2005US20050272242 Formation method for conductive bump
12/08/2005US20050272241 Method for forming interconnects on thin wafers
12/08/2005US20050272240 Method and process intermediate for electrostatic discharge protection in flat panel imaging detectors
12/08/2005US20050272239 Method for making a semiconductor device including band-engineered superlattice using intermediate annealing
12/08/2005US20050272238 Method for depositing and etching ruthenium layers
12/08/2005US20050272237 Dual damascene integration structure and method for forming improved dual damascene integration structure
12/08/2005US20050272236 Method for forming bit line contact hole/contact structure
12/08/2005US20050272235 Method of forming silicided gate structure
12/08/2005US20050272234 Method for fabricating storage electrode of semiconductor device
12/08/2005US20050272233 Recessed gate electrodes having covered layer interfaces and methods of forming the same
12/08/2005US20050272232 Method for forming gate electrode of semiconductor device
12/08/2005US20050272231 Gate-all-around type of semiconductor device and method of fabricating the same
12/08/2005US20050272230 Complementary analog bipolar transistors with trench-constrained isolation diffusion
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