Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2005
12/15/2005US20050278673 Thin-film transistor circuit, design method for thin-film transistor, design program for thin-film transistor circuit, design program recording medium, design library database, and display device
12/15/2005US20050278672 LSI design method
12/15/2005US20050278597 Methods and apparatus for data analysis
12/15/2005US20050278595 Built-in self test circuit and test method for storage device
12/15/2005US20050278138 Micropattern measuring method, micropattern measuring apparatus, and computer-readable recording medium on which a micropattern measuring program is recorded
12/15/2005US20050278060 Topology simulation system, topology simulation method, and computer product
12/15/2005US20050278056 Machine vision systems for use with programmable material consolidation system and associated methods and structures
12/15/2005US20050278049 Method of planning tasks in a machine, method of controlling a machine, supervisory machine control system, lithographic apparatus, lithographic processing cell and computer program
12/15/2005US20050277780 Vapor deposition of metal oxides, silicates and phosphates, and silicon dioxide
12/15/2005US20050277756 Porous film-forming composition, patterning process, and porous sacrificial film
12/15/2005US20050277394 Semiconductor integrated circuit device with noise reduction function
12/15/2005US20050277371 Transparent microporous materials for CMP
12/15/2005US20050277370 Nozzle for injecting sublimable solid particles entrained in gas for cleaning a surface
12/15/2005US20050277367 Chemical-mechanical polishing (CMP) slurry containing clay and CeO2 abrasive particles and method of planarizing surfaces
12/15/2005US20050277305 Driving Method For Galvano Scanner
12/15/2005US20050277303 Forming porous diamond films for semiconductor applications
12/15/2005US20050277302 Advanced low dielectric constant barrier layers
12/15/2005US20050277301 Method for forming a plane structure
12/15/2005US20050277300 Method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits
12/15/2005US20050277299 Methods for fabricating read sensor for magnetic heads with reduced read track width
12/15/2005US20050277298 Adhesion of copper and etch stop layer for copper alloy
12/15/2005US20050277296 Method to reduce impurity elements during semiconductor film deposition
12/15/2005US20050277295 Coating process for patterned substrate surfaces
12/15/2005US20050277294 Method for treating a semiconductor surface to form a metal-containing layer
12/15/2005US20050277293 Fabrication method of wafer level chip scale packages
12/15/2005US20050277292 Method for fabricating low resistivity barrier for copper interconnect
12/15/2005US20050277291 Method of manufacturing electronic device
12/15/2005US20050277290 Integration of titanium and titanium nitride layers
12/15/2005US20050277289 Line edge roughness reduction for trench etch
12/15/2005US20050277288 Stackable semiconductor chip layer comprising prefabricated trench interconnect vias
12/15/2005US20050277287 Contact etching utilizing multi-layer hard mask
12/15/2005US20050277286 Metallic glass microtool
12/15/2005US20050277285 Method of fabricating an interconnect structure having reduced internal stress
12/15/2005US20050277284 Method for manufacturing a semiconductor device
12/15/2005US20050277283 Chip structure and method for fabricating the same
12/15/2005US20050277281 Compliant interconnect and method of formation
12/15/2005US20050277280 Semiconductor device with a high thermal dissipation efficiency
12/15/2005US20050277279 Microfeature devices and methods for manufacturing microfeature devices
12/15/2005US20050277278 Method of manufacturing a wafer
12/15/2005US20050277277 Dual damascene process
12/15/2005US20050277276 Decoupled complementary mask patterning transfer method
12/15/2005US20050277275 Method for forming a semiconductor device having a silicide layer
12/15/2005US20050277273 Method for introducing impurities and apparatus for introducing impurities
12/15/2005US20050277272 Low temperature epitaxial growth of silicon-containing films using UV radiation
12/15/2005US20050277271 RAISED STI PROCESS FOR MULTIPLE GATE OX AND SIDEWALL PROTECTION ON STRAINED Si/SGOI STRUCTURE WITH ELEVATED SOURCE/DRAIN
12/15/2005US20050277270 Wafer processing method
12/15/2005US20050277269 Method of manufacturing a material compound wafer
12/15/2005US20050277268 Manufacturing method of semiconductor wafer having lid part and manufacturing method of semiconductor device
12/15/2005US20050277267 Method for manufacturing a compound material wafer
12/15/2005US20050277266 Process for interfacial adhesion in laminate structures through patterned roughing of a surface
12/15/2005US20050277265 Methods of forming trench isolation layers using high density plasma chemical vapor deposition
12/15/2005US20050277264 Improved process for forming a buried plate
12/15/2005US20050277263 Forming Shallow Trench Isolation Without the Use of CMP
12/15/2005US20050277262 Method for manufacturing isolation structures in a semiconductor device
12/15/2005US20050277261 Method for manufacturing cell transistor
12/15/2005US20050277260 Mixed orientation and mixed material semiconductor-on-insulator wafer
12/15/2005US20050277259 Manufacturing method of gate oxidation films
12/15/2005US20050277258 Method for forming self-aligned contact in semiconductor device
12/15/2005US20050277257 Gap filling with a composite layer
12/15/2005US20050277256 Nanolaminates of hafnium oxide and zirconium oxide
12/15/2005US20050277255 Compound semiconductor device and manufacturing method thereof
12/15/2005US20050277254 Methods of forming device with recessed gate electrodes
12/15/2005US20050277253 Non-volatile memory and method of manufacturing the same
12/15/2005US20050277252 Methods of forming a gate structure of a non-volatile memory device and apparatus for performing the same
12/15/2005US20050277251 Method of manufacturing flash memory device
12/15/2005US20050277250 Method for fabricating a floating gate memory device
12/15/2005US20050277249 Methods for forming semiconductor structures
12/15/2005US20050277248 Methods of forming void-free layers in openings of semiconductor substrates
12/15/2005US20050277247 Method for fabricating a trench capacitor of dram
12/15/2005US20050277246 Formation of doped regions and/or ultra-shallow junctions in semiconductor materials by gas-cluster ion irradiation
12/15/2005US20050277245 Method for forming bump on electrode pad with use of double-layered film
12/15/2005US20050277244 Method for fastening microtool components to objects
12/15/2005US20050277243 Flash memory having a high-permittivity tunnel dielectric
12/15/2005US20050277242 Method for fabricating a deep trench capacitor of dram device
12/15/2005US20050277241 Semiconductor device and ic card
12/15/2005US20050277240 Logic components from organic field effect transistors
12/15/2005US20050277239 Method for manufacturing CMOS image sensor
12/15/2005US20050277238 Method of manufacturing a semiconductor device
12/15/2005US20050277237 Structure from which an integrated circuit may be fabricated and a method of making same
12/15/2005US20050277236 Method for manufacturing semiconductor device
12/15/2005US20050277235 Methods of manufacturing semiconductor devices having single crystalline silicon layers and related semiconductor devices
12/15/2005US20050277234 Flexible carbon-based ohmic contacts for organic transistors
12/15/2005US20050277233 Semiconductor device and method of manufacturing the same
12/15/2005US20050277232 Diode junction poly fuse
12/15/2005US20050277231 Underfill and encapsulation of semicondcutor assemblies with materials having differing properties and methods of fabrication using stereolithography
12/15/2005US20050277230 Process for producing a chip arrangement provided with a molding compound
12/15/2005US20050277229 Chip packaging structure and method of making wafer level packaging
12/15/2005US20050277228 Method and apparatus for forming interposers on integrated circuits
12/15/2005US20050277227 Chip scale package with open substrate
12/15/2005US20050277226 High density flip chip interconnections
12/15/2005US20050277225 Method for production of semiconductor package
12/15/2005US20050277223 Method of forming metal oxide using an atomic layer deposition process
12/15/2005US20050277220 Encapsulation for particle entrapment
12/15/2005US20050277219 Sensor design and process
12/15/2005US20050277218 Group III nitride compound semiconductor light-emitting device and method for producing the same
12/15/2005US20050277217 Method for manufacturing micro-structural unit
12/15/2005US20050277215 Optically pumped edge-emitting semiconductor laser
12/15/2005US20050277214 Nitride single crystal and producing method thereof
12/15/2005US20050277212 Semiconductor element, semiconductor device, and method for fabrication thereof
12/15/2005US20050277211 Semiconductor optical devices and method for forming