Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2005
12/01/2005WO2005112577A2 Methods to fabricate mosfet devices using selective deposition processes
12/01/2005WO2005112576A2 Method of bumping die pads for wafer testing
12/01/2005WO2005098909A3 Drive system for scanning a workpiece through an ion beam
12/01/2005WO2005057625A3 Method of differentially patterning layers of organic thin film material without damaging underlying layers
12/01/2005WO2005056202A3 Apparatus and method for cleaning surfaces
12/01/2005WO2005055278A3 Customized microelectronic device and method for making customized electrical interconnections
12/01/2005WO2005050700A3 Line edge roughness reduction for trench etch
12/01/2005WO2005001901A3 Wet developable hard mask in conjunction with thin photoresist for micro photolithography
12/01/2005WO2004102690A3 Organic polymers, laminates, and capacitors
12/01/2005WO2004100169A3 Mram architecture with a bit line located underneath the magnetic tunneling junction device
12/01/2005WO2004075251A3 Tmos-infrared uncooled sensor and focal plane array
12/01/2005WO2004063422B1 Method for curing low dielectric constant film using direct current bias
12/01/2005WO2004059702A3 Method and apparatus for monitoring a material processing system
12/01/2005WO2004057060A3 Multi-chemistry electrochemical processing system
12/01/2005US20050268270 Layout data saving method, layout data converting device and graphic verifying device
12/01/2005US20050268264 Apparatus and method for calculating crosstalk
12/01/2005US20050268261 Circuit analyzing method and circuit analyzing device
12/01/2005US20050268257 Semiconductor integrated circuit, method for designing semiconductor integrated circuit and system for designing semiconductor integrated circuit
12/01/2005US20050268123 Data processing device and semiconductor device
12/01/2005US20050267705 Method and system for providing quality control on wafers running on a manufacturing line
12/01/2005US20050267622 Synthesizing semiconductor process flow models
12/01/2005US20050267621 Temperature abnormality detection method and semiconductor manufacturing apparatus
12/01/2005US20050267620 Substrate apparatus calibration and synchronization procedure
12/01/2005US20050267609 Lithographic motion control system and method
12/01/2005US20050267305 Volatile copper(II) complexes for deposition of copper films by atomic layer deposition
12/01/2005US20050267277 Composition for forming anti-reflective coating film, anti-reflective coating film composed of the composition, and method of forming resist pattern using the composition
12/01/2005US20050267275 A fluorinated vinyl sulfonate-polyalkenamer-acrylic acid or ester terpolymer with excellent transparency, substrate adhesion, developer penetrability, and plasma etch resistance; lithographic microprocessing; photoresists
12/01/2005US20050267253 vapor-deposited organosiloxane copolymer film; first organosiloxane monomer with cyclosiloxane backbone and the second organosiloxane monomer with straight-chain siloxane backbone as raw materials
12/01/2005US20050267000 Method for producing substantially planar films
12/01/2005US20050266781 Holder for wafers
12/01/2005US20050266777 Nozzle for spraying sublimable solid particles entrained in gas for cleaning surface and method of cleaning surface using the same
12/01/2005US20050266734 Support member assembly for conductive contact members
12/01/2005US20050266728 Electrical connector with load bearing features
12/01/2005US20050266700 Codeposition of hafnium-germanium oxides on substrates used in or for semiconductor devices
12/01/2005US20050266699 Organosilicate polymer and insulating film therefrom
12/01/2005US20050266698 Exposed pore sealing post patterning
12/01/2005US20050266697 Light-emitting nanoparticles and method of making same
12/01/2005US20050266696 [method of forming a silicon nitride layer]
12/01/2005US20050266695 Novel aqueous based metal etchant
12/01/2005US20050266694 Controlling bubble formation during etching
12/01/2005US20050266693 Method for manufacturing semiconductor device
12/01/2005US20050266692 Method of patterning a film
12/01/2005US20050266691 Carbon-doped-Si oxide etch using H2 additive in fluorocarbon etch chemistry
12/01/2005US20050266690 Manufacture of probe unit having lead probes extending beyond edge of substrate
12/01/2005US20050266689 Chemical mechanical polishing composition and process
12/01/2005US20050266688 Semiconductor device fabrication method
12/01/2005US20050266687 Method of manufacturing semiconductor device and semiconductor device
12/01/2005US20050266686 Method of substrate surface treatment for RRAM thin film deposition
12/01/2005US20050266685 Method and apparatus for controlling a semiconductor fabrication temperature
12/01/2005US20050266684 Methods of fabricating tungsten contacts with tungsten nitride barrier layers in semiconductor devices, tungsten contacts with tungsten nitride barrier layers, and apparatus for fabricating the same
12/01/2005US20050266683 Remover compositions for dual damascene system
12/01/2005US20050266682 Methods and apparatus for forming barrier layers in high aspect ratio vias
12/01/2005US20050266681 Formation of low resistance via contacts in interconnect structures
12/01/2005US20050266680 Methods of fabricating complex blade geometries from silicon wafers and strengthening blade geometries
12/01/2005US20050266679 Barrier structure for semiconductor devices
12/01/2005US20050266678 Source lines for NAND memory devices
12/01/2005US20050266677 Semiconductor device and method of manufacturing the same
12/01/2005US20050266676 Multi-layer dielectric and method of forming same
12/01/2005US20050266675 Wafer-level thick film standing-wave clocking
12/01/2005US20050266674 Screen printing method of forming conductive bumps
12/01/2005US20050266673 Reduced electromigration and stressed induced migration of copper wires by surface coating
12/01/2005US20050266672 Wire-bonding method for chips with copper interconnects by introducing a thin layer
12/01/2005US20050266671 Manufacturing method of semiconductor device
12/01/2005US20050266670 Chip bonding process
12/01/2005US20050266669 Method and apparatus to eliminate galvanic corrosion on copper doped aluminum bond pads on integrated circuits
12/01/2005US20050266668 Semiconductor device and method of manufacturing the same
12/01/2005US20050266667 Structure and method of forming metal buffering layer
12/01/2005US20050266666 Suppression of cross diffusion and gate depletion
12/01/2005US20050266665 Methods of manufacturing semiconductor devices with gate structures having an oxide layer on the sidewalls thereof and related processing apparatus
12/01/2005US20050266664 Method for forming a fully silicided semiconductor device
12/01/2005US20050266663 Method of forming lattice-matched structure on silicon and structure formed thereby
12/01/2005US20050266662 Method of growing semiconductor nanowires with uniform cross-sectional area using chemical vapor deposition
12/01/2005US20050266661 Semiconductor wafer with ditched scribe street
12/01/2005US20050266660 Method for the production of indiviual monolithically integrated semiconductor circuits
12/01/2005US20050266659 Methods for transferring a useful layer of silicon carbide to a receiving substrate
12/01/2005US20050266658 Glass-based SOI structures
12/01/2005US20050266657 Substrate manufacturing method
12/01/2005US20050266656 Method for producing a multilayer storage media
12/01/2005US20050266655 Dielectric gap fill with oxide selectively deposited over silicon liner
12/01/2005US20050266654 Barrier to amorphization implant
12/01/2005US20050266653 Substrate manufacturing method
12/01/2005US20050266652 High density mimcap with a unit repeatable structure
12/01/2005US20050266651 Integrated via resistor
12/01/2005US20050266650 Semiconductor device with flowable insulation layer formed on capacitor and method for fabricating the same
12/01/2005US20050266649 Electronic device manufacturing apparatus
12/01/2005US20050266648 Methods of forming field effect transistors having recessed channel regions
12/01/2005US20050266647 Method of manufacturing a semiconductor device
12/01/2005US20050266646 Method of forming trench in semiconductor device
12/01/2005US20050266645 Phosphorous doping methods of manufacturing field effect transistors having multiple stacked channels
12/01/2005US20050266644 Method of manufacturing semiconductor device having multiple gate oxide films
12/01/2005US20050266643 Memory with recessed devices
12/01/2005US20050266642 Semiconductor device and a method of fabricating the same
12/01/2005US20050266641 Method of forming films in a trench
12/01/2005US20050266640 Method of forming a dielectric layer and method of manufacturing a nonvolatile memory device using the same
12/01/2005US20050266639 Techique for controlling mechanical stress in a channel region by spacer removal
12/01/2005US20050266638 Methods of forming non-volatile memory cells including fin structures and related devices
12/01/2005US20050266637 Tunnel oxynitride in flash memories
12/01/2005US20050266636 Semiconductor device and method of manufacturing the same
12/01/2005US20050266635 Graded GexSe100-x concentration in PCRAM
12/01/2005US20050266634 Methods of fabricating semiconductor devices including polysilicon resistors and related devices
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