Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2005
12/13/2005US6975142 Semiconductor device
12/13/2005US6975126 Contactor apparatus for semiconductor devices and a test method of semiconductor devices
12/13/2005US6975125 Semiconductor device tester
12/13/2005US6975107 Eddy current sensing of metal removal for chemical mechanical polishing
12/13/2005US6975102 Apparatus and method for analyzing capacitance of insulator
12/13/2005US6975041 Semiconductor storage device having high soft-error immunity
12/13/2005US6975040 Fabricating semiconductor chips
12/13/2005US6975039 Method of forming a ball grid array package
12/13/2005US6975038 Chip scale pin array
12/13/2005US6975036 Flip-chip semiconductor device utilizing an elongated tip bump
12/13/2005US6975035 Method and apparatus for dielectric filling of flip chip on interposer assembly
12/13/2005US6975033 Semiconductor device and method for manufacturing the same
12/13/2005US6975032 Copper recess process with application to selective capping and electroless plating
12/13/2005US6975025 Semiconductor chip package and method of manufacturing same
12/13/2005US6975024 Hybrid integrated circuit device and manufacturing method thereof
12/13/2005US6975023 Co-packaged control circuit, transistor and inverted diode
12/13/2005US6975022 Board for manufacturing a BGA and method of manufacturing semiconductor device using thereof
12/13/2005US6975020 Semiconductor integrated circuit having pads layout for increasing signal integrity and reducing chip size
12/13/2005US6975019 Semiconductor memory device having a multi-layered interlayer insulation consisting of deuterium and nitride
12/13/2005US6975018 Semiconductor device
12/13/2005US6975017 Healing of micro-cracks in an on-chip dielectric
12/13/2005US6975016 Wafer bonding using a flexible bladder press and thinned wafers for three-dimensional (3D) wafer-to-wafer vertical stack integration, and application thereof
12/13/2005US6975015 Modulated trigger device
12/13/2005US6975014 Method for making an ultra thin FDSOI device with improved short-channel performance
12/13/2005US6975013 Diode and method for manufacturing the same
12/13/2005US6975007 Semiconductor device including a polysilicon, barrier structure, and tungsten layer electrode
12/13/2005US6975003 Semiconductor CMOS SOI
12/13/2005US6975002 SOI single crystalline chip structure
12/13/2005US6975001 Semiconductor device and method of fabricating the same
12/13/2005US6975000 Method of forming a recessed buried-diffusion device
12/13/2005US6974999 Semiconductor device and method of manufacturing the same
12/13/2005US6974998 Field effect transistor with corner diffusions for reduced leakage
12/13/2005US6974997 High-voltage MOS transistor
12/13/2005US6974996 Semiconductor device and method of manufacturing the same
12/13/2005US6974995 Method and system for forming dual gate structures in a nonvolatile memory using a protective layer
12/13/2005US6974994 Capacitor with a geometrical layout
12/13/2005US6974993 Double-sided capacitor structure for a semiconductor device and a method for forming the structure
12/13/2005US6974992 Semiconductor device having a non-straight line pattern with plural interconnected arched lines
12/13/2005US6974991 DRAM cell with buried collar and self-aligned buried strap
12/13/2005US6974990 Selective polysilicon stud growth
12/13/2005US6974989 Structure and method for protecting memory cells from UV radiation damage and UV radiation-induced charging during backend processing
12/13/2005US6974988 DRAM cell structure capable of high integration and fabrication method thereof
12/13/2005US6974987 Semiconductor device
12/13/2005US6974986 Semiconductor memory device and method of manufacturing the same
12/13/2005US6974985 Capacitor and method for fabricating the same, and semiconductor device and method for fabricating the same
12/13/2005US6974984 A collimator as a flux reducer may be used to filter out charged particles and reduce damage; amorphous, intermetallic layers
12/13/2005US6974983 Isolated FinFET P-channel/N-channel transistor pair
12/13/2005US6974982 Method of manufacturing semiconductor device and semiconductor device
12/13/2005US6974981 Isolation structures for imposing stress patterns
12/13/2005US6974979 Nonvolatile semiconductor memory
12/13/2005US6974977 Heterojunction bipolar transistor
12/13/2005US6974970 Semiconductor device
12/13/2005US6974969 P-type quantum-well-base bipolar transistor device employing interdigitated base and emitter formed with a capping layer
12/13/2005US6974968 Method and apparatus for fabricating self-aligned contacts in an integrated circuit
12/13/2005US6974963 Substrate inspecting device, coating/developing device and substrate inspecting method
12/13/2005US6974962 Lateral shift measurement using an optical technique
12/13/2005US6974960 Exposure system and exposure method
12/13/2005US6974953 Infrared sensor device and manufacturing method thereof
12/13/2005US6974781 Reactor precoating for reduced stress and uniform CVD
12/13/2005US6974780 Semiconductor processing methods of chemical vapor depositing SiO2 on a substrate
12/13/2005US6974779 Interfacial oxidation process for high-k gate dielectric process integration
12/13/2005US6974778 Semiconductor device manufactured with auxillary mask and method for producing the same
12/13/2005US6974777 CMP compositions for low-k dielectric materials
12/13/2005US6974776 Activation plate for electroless and immersion plating of integrated circuits
12/13/2005US6974775 Method and apparatus for making an imprinted conductive circuit using semi-additive plating
12/13/2005US6974774 Methods of forming a contact opening in a semiconductor assembly using a disposable hard mask
12/13/2005US6974773 High pressure anneals of integrated circuit structures
12/13/2005US6974772 Integrated low-k hard mask
12/13/2005US6974771 Methods and apparatus for forming barrier layers in high aspect ratio vias
12/13/2005US6974770 Self-aligned mask to reduce cell layout area
12/13/2005US6974769 Conductive structure fabrication process using novel layered structure and conductive structure fabricated thereby for use in multi-level metallization
12/13/2005US6974768 Methods of providing an adhesion layer for adhesion of barrier and/or seed layers to dielectric films
12/13/2005US6974767 Chemical solution for electroplating a copper-zinc alloy thin film
12/13/2005US6974766 In situ deposition of a low κ dielectric layer, barrier layer, etch stop, and anti-reflective coating for damascene application
12/13/2005US6974765 Encapsulation of pin solder for maintaining accuracy in pin position
12/13/2005US6974764 Method for making a semiconductor device having a metal gate electrode
12/13/2005US6974763 Method of forming semiconductor device by crystallizing amorphous silicon and forming crystallization promoting material in the same chamber
12/13/2005US6974762 Adhesion of carbon doped oxides by silanization
12/13/2005US6974761 Method of forming a semiconductor laser chip having a marker
12/13/2005US6974760 Methods for transferring a useful layer of silicon carbide to a receiving substrate
12/13/2005US6974759 Method for making a stacked comprising a thin film adhering to a target substrate
12/13/2005US6974758 Method of producing a light-emitting diode
12/13/2005US6974757 Method of forming silicon-on-insulator comprising integrated circuitry
12/13/2005US6974756 Methods of forming shallow trench isolation
12/13/2005US6974755 Isolation structure with nitrogen-containing liner and methods of manufacture
12/13/2005US6974754 Semiconductor device including ferroelectric capacitors and fabricating method thereof
12/13/2005US6974753 Method of manufacturing lateral MOSFET structure of an integrated circuit having separated device regions
12/13/2005US6974752 Methods of fabricating integrated circuit devices having uniform silicide junctions
12/13/2005US6974751 Semiconductor device and method for producing the same
12/13/2005US6974750 Process for forming a trench power MOS device suitable for large diameter wafers
12/13/2005US6974749 Bottom oxide formation process for preventing formation of voids in trench
12/13/2005US6974748 Semiconductor device with split gate electrode structure and method for manufacturing the semiconductor device
12/13/2005US6974747 Method of manufacturing semiconductor device
12/13/2005US6974746 Method of manufacturing a nonvolatile semiconductor memory device having a stacked gate structure
12/13/2005US6974745 Method of manufacturing semiconductor device
12/13/2005US6974744 Fringing capacitor structure
12/13/2005US6974743 Method of making encapsulated spacers in vertical pass gate DRAM and damascene logic gates
12/13/2005US6974742 Method for fabricating complementary metal oxide semiconductor image sensor
12/13/2005US6974741 Method for forming shallow trench in semiconductor device
12/13/2005US6974740 Symmetric inducting device for an integrated circuit having a ground shield
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