Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2005
12/20/2005US6977181 MTJ stack with crystallization inhibiting layer
12/20/2005US6977134 Manufacturing method of a MOSFET gate
12/20/2005US6977130 Method of manufacturing an electronic circuit and manufacturing apparatus of an electronic circuit
12/20/2005US6977128 Multi-layered semiconductor structure
12/20/2005US6977127 Alternating phase shift mask
12/20/2005US6977126 Pellicle, photomask, pellicle frame, and method for manufacturing pellicle
12/20/2005US6977098 Method of uniformly coating a substrate
12/20/2005US6977035 using solution including a compound containing a structure of X S Y , wherein X and Y are chosen from hydrogen atom, carbon atom, sulfur atom, nitrogen atom, and oxygen atom, and contacting solution with ozone
12/20/2005US6977024 Method for manufacturing semiconductor device using adhesive sheet with embedded conductor bodies
12/20/2005US6977014 Architecture for high throughput semiconductor processing applications
12/20/2005US6976910 Polishing pad
12/20/2005US6976908 Polishing head and polishing apparatus
12/20/2005US6976903 Apparatus for controlling retaining ring and wafer head tilt for chemical mechanical polishing
12/20/2005US6976850 Connector
12/20/2005US6976822 End-effectors and transfer devices for handling microelectronic workpieces
12/20/2005US6976585 Wafer carrier with ultraphobic surfaces
12/20/2005US6976400 Method and apparatus for damping vibrations in a semiconductor wafer handling arm
12/20/2005CA2246057C Thin film fabrication technique for implantable electrodes
12/15/2005WO2005120139A1 Surface-treated copper foil and flexible copper-clad laminate plate and film carrier tape manufactured by use of the surface-treated copper foil
12/15/2005WO2005119802A2 Adaptive shape substrate support system and method
12/15/2005WO2005119796A1 Laser structuring for manufacture of thin film silicon solar cells
12/15/2005WO2005119793A2 Silicon carbide schottky diodes and fabrication method
12/15/2005WO2005119789A1 Electronic device manufacturing method and electronic device
12/15/2005WO2005119788A1 Field effect transistor and manufacturing method thereof
12/15/2005WO2005119787A1 Methods of fabricating nitride-based transistors having regrown ohmic contact regions and nitride-based transistors having regrown ohmic contact regions
12/15/2005WO2005119784A2 Method for enhancing field oxide and integrated circuit with enhanced field oxide
12/15/2005WO2005119783A2 Ballistic injection nrom flash memory
12/15/2005WO2005119781A1 Laminating system
12/15/2005WO2005119780A1 Semiconductor device and process for fabricating the same
12/15/2005WO2005119779A1 Memory device and manufacturing method of the same
12/15/2005WO2005119778A2 Field effect transistor
12/15/2005WO2005119776A1 Semiconductor device having three-dimensional stack structure and method for manufacturing the same
12/15/2005WO2005119775A2 Semiconductor structure comprising a stress sensitive element and method of measuring a stress in a semiconductor structure
12/15/2005WO2005119774A1 Method and apparatus for precise marking and placement of an object
12/15/2005WO2005119773A1 Module integration integrated circuits
12/15/2005WO2005119768A1 Improved etch method
12/15/2005WO2005119764A1 Semiconductor device and method for manufacturing the same
12/15/2005WO2005119763A1 Semiconductor device and manufacturing method thereof
12/15/2005WO2005119762A1 Single metal gate material cmos using strained si-silicon germanium heterojunction layered substrate
12/15/2005WO2005119761A2 Memory with recessed devices
12/15/2005WO2005119760A1 Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress
12/15/2005WO2005119759A1 Semiconductor device and electronic device
12/15/2005WO2005119758A1 Method for forming trench isolation structure
12/15/2005WO2005119757A2 Packaged integrated circuit devices
12/15/2005WO2005119756A1 Semiconductor package with transparent lid
12/15/2005WO2005119755A1 Soldering method, solder pellet for die bonding, method for manufacturing solder pellet for die bonding and electronic component
12/15/2005WO2005119754A1 Flexible leadframe structure and method for forming integrated circuit packages
12/15/2005WO2005119753A2 Systems and methods for nanowire growth and harvesting
12/15/2005WO2005119752A1 Method for forming a semiconductor device having a silicide layer
12/15/2005WO2005119751A1 Semiconductor device and method for manufacturing same
12/15/2005WO2005119750A1 Semiconductor device and method for fabricating same
12/15/2005WO2005119749A1 Gas treating device and film forming device
12/15/2005WO2005119748A1 Substrate cleaning method and computer readable recording medium
12/15/2005WO2005119747A2 Semiconductor wafer with ditched scribe street
12/15/2005WO2005119746A1 Separately strained n-channel and p-channel transistors
12/15/2005WO2005119745A1 Impurity introducing method
12/15/2005WO2005119744A1 Method for manufacturing compound semiconductor substrate provided with pn junction
12/15/2005WO2005119743A1 Substrate for electronic application comprising a flexible support and method for production thereof
12/15/2005WO2005119742A1 Exposure apparatus, exposure method, and device producing method
12/15/2005WO2005119741A2 Dram structures with source/drain pedestals and manufacturing method thereof
12/15/2005WO2005119740A1 Stackable tray for integrated circuit chips
12/15/2005WO2005119739A2 Electronic component for preventing undesired switching between monitoring modes
12/15/2005WO2005119707A2 Power light emitting die package with reflecting lens and the method of making the same
12/15/2005WO2005119527A1 Back annotation equipment, mask layout correcting equipment, back annotation method, program, recording medium, process for fabricating semiconductor integrated circuit
12/15/2005WO2005119367A1 Water-repellent composition, water-repellent thin film, and thin film with water-repellent/hydrophilic pattern
12/15/2005WO2005119363A2 Assembly for supporting a workpiece or specimen in a charged particle beam system
12/15/2005WO2005119227A1 Semiconductor appearance inspecting device and illuminating method
12/15/2005WO2005119226A1 Apparatus and method for inspecting semiconductor wafer
12/15/2005WO2005119225A1 Device and method for optical reflectometry under oblique angle
12/15/2005WO2005118914A2 Substrate support system and method
12/15/2005WO2005118911A1 Plasma cvd equipment
12/15/2005WO2005118910A1 Method of forming metal laminate thin film or oxide thin film using supercritical fluid or subcritical fluid, and film forming apparatus therefor
12/15/2005WO2005118907A1 Variable quadruple electromagnet array, particularly used in a multi-step process for forming a metal barrier in a sputter reactor
12/15/2005WO2005118736A1 Electrochemical-mechanical polishing composition and method for using the same
12/15/2005WO2005118291A2 Bonded assemblies
12/15/2005WO2005101461B1 Apparatus for controlling gas flow in a semiconductor substrate processing chamber
12/15/2005WO2005098929A3 Method of forming sidewall spacers
12/15/2005WO2005091796A3 Method and system for treating a hard mask to improve etch characteristics
12/15/2005WO2005091795A3 Method of making a semiconductor device, and semiconductor device made thereby
12/15/2005WO2005087974A3 Cvd processes for the deposition of amorphous carbon films
12/15/2005WO2005083794A3 High voltage pmos transistor
12/15/2005WO2005079400A3 Buried guard ring and radiation hardened isolation structures and fabrication methods
12/15/2005WO2005077024A3 Methods and apparatus for data analysis
12/15/2005WO2005076807A3 A threshold voltage stabilizer, method of manufacturing and integrated circuit employing the same
12/15/2005WO2005074471A3 Method for forming a memory structure using a modified surface topography and structure thereof
12/15/2005WO2005067020A3 A method of varying etch selectivities of a film
12/15/2005WO2005057614A3 Extractor/buffer
12/15/2005WO2005054949A3 Laser thin film poly-silicon annealing system
12/15/2005WO2005048318A3 Nitride metal oxide semiconductor integrated transistor devices
12/15/2005WO2005043582A3 Method for manufacturing p-type group iii nitride semiconductor, and group iii nitride semiconductor light-emitting device
12/15/2005WO2005041623A3 Plasma processing apparatus, control method for plasma processing apparatus, and evaluation method for plasma processing apparatus
12/15/2005WO2005040755A3 Nanoscale transduction systems for detecting molecular interactions
12/15/2005WO2005036596A3 Method and apparatus of etch process control in fabrications of microstructures
12/15/2005WO2005027222A3 Assembly of an electrical component comprising an electrical insulation film on a substrate and method for producing said assembly
12/15/2005WO2005020278A3 System and method for validating and visualizing apc assisted semiconductor manufacturing processes
12/15/2005WO2005005562B1 Plasma spraying for joining silicon parts
12/15/2005WO2004101702A9 Ceria abrasive for cmp
12/15/2005WO2004068572A8 Method for producing a semiconductor component
12/15/2005WO2004017380A3 A single-shot semiconductor processing system and method having various irradiation patterns
12/15/2005US20050278674 Nested design approach
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