Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2014
02/18/2014US8652970 Vacuum processing method and vacuum processing apparatus
02/18/2014US8652969 High aspect ratio and reduced undercut trench etch process for a semiconductor substrate
02/18/2014US8652968 Method of manufacturing a semiconductor device
02/18/2014US8652967 Adjuvant for controlling polishing selectivity and chemical mechanical polishing slurry comprising the same
02/18/2014US8652966 Semiconductor device manufacturing method and semiconductor device
02/18/2014US8652965 Production method for thick film metal electrode and production method for thick film resist
02/18/2014US8652964 Method and apparatus for the formation of an electronic device
02/18/2014US8652963 MOSFET integrated circuit with uniformly thin silicide layer and methods for its manufacture
02/18/2014US8652962 Etch damage and ESL free dual damascene metal interconnect
02/18/2014US8652960 Active area bonding compatible high current structures
02/18/2014US8652959 n- and p-channel field effect transistors with single quantum well for complementary circuits
02/18/2014US8652958 Vertical deep ultraviolet light emitting diodes
02/18/2014US8652957 High-K gate dielectric oxide
02/18/2014US8652956 High-k metal gate electrode structures formed by separate removal of placeholder materials using a masking regime prior to gate patterning
02/18/2014US8652955 Manufacturing method of semiconductor integrated circuit device
02/18/2014US8652954 Method for manufacturing silicon carbide semiconductor device
02/18/2014US8652953 Plasma doping method with gate shutter
02/18/2014US8652952 Semiconductor structure made using improved multiple ion implantation process
02/18/2014US8652951 Selective epitaxial germanium growth on silicon-trench fill and in situ doping
02/18/2014US8652950 C-rich carbon boron nitride dielectric films for use in electronic devices
02/18/2014US8652949 Method of manufacturing semiconductor wafer
02/18/2014US8652948 Nitride semiconductor, nitride semiconductor crystal growth method, and nitride semiconductor light emitting element
02/18/2014US8652947 Non-polar III-V nitride semiconductor and growth method
02/18/2014US8652946 Graphene layer formation on a carbon based substrate
02/18/2014US8652945 Epitaxy of high tensile silicon alloy for tensile strain applications
02/18/2014US8652944 Method for making side growth semiconductor nanowires and transistors obtained by said method
02/18/2014US8652943 Method of processing substrate
02/18/2014US8652942 Method for manufacturing electronic parts
02/18/2014US8652941 Wafer dicing employing edge region underfill removal
02/18/2014US8652940 Wafer dicing used hybrid multi-step laser scribing process with plasma etch
02/18/2014US8652939 Method and apparatus for die assembly
02/18/2014US8652938 Thermally releasable sheet-integrated film for semiconductor back surface, method of collecting semiconductor element, and method of producing semiconductor device
02/18/2014US8652937 Methods of fabricating back-illuminated imaging sensors
02/18/2014US8652936 Vertical cavity surface emitting devices incorporating wafer fused reflectors
02/18/2014US8652935 Void-free wafer bonding using channels
02/18/2014US8652934 Semiconductor substrate for photonic and electronic structures and method of manufacture
02/18/2014US8652933 Semiconductor structure having wide and narrow deep trenches with different materials
02/18/2014US8652932 Semiconductor devices having fin structures, and methods of forming semiconductor devices having fin structures
02/18/2014US8652931 Method of dual-depth STI formation
02/18/2014US8652930 Semiconductor device with self-biased isolation
02/18/2014US8652929 CMOS device for reducing charge sharing effect and fabrication method thereof
02/18/2014US8652928 Method of manufacturing a semiconductor device
02/18/2014US8652927 Integration of non-noble DRAM electrode
02/18/2014US8652926 Methods of forming capacitors
02/18/2014US8652925 Method of fabricating isolated capacitors and structure thereof
02/18/2014US8652924 Methods of fabricating a storage node in a semiconductor device and methods of fabricating a capacitor using the same
02/18/2014US8652923 Nonvolatile memory device having an electrode interface coupling region
02/18/2014US8652922 Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture
02/18/2014US8652921 Semiconductor device having a damp-proof structure and method of fabricating the same
02/18/2014US8652919 Tunable semiconductor device
02/18/2014US8652918 Nitride semiconductor structure
02/18/2014US8652917 Superior stability of characteristics of transistors having an early formed high-K metal gate
02/18/2014US8652916 Self aligned impact-ionization MOS (I-MOS) device and methods of manufacture
02/18/2014US8652915 Methods of fabricating semiconductor devices using preliminary trenches with epitaxial growth
02/18/2014US8652914 Two-step silicide formation
02/18/2014US8652913 Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss
02/18/2014US8652912 Methods of fabricating a transistor gate including cobalt silicide
02/18/2014US8652911 Semiconductor device and method of manufacturing the same
02/18/2014US8652910 Method for fabricating semiconductor device and device using same
02/18/2014US8652909 Methods of forming a nonvolatile memory cell and methods of forming an array of nonvolatile memory cells array of nonvolatile memory cells
02/18/2014US8652908 Semiconductor devices employing high-K dielectric layers as a gate insulating layer and methods of fabricating the same
02/18/2014US8652907 Integrating transistors with different poly-silicon heights on the same die
02/18/2014US8652904 Semiconductor device with gate trench
02/18/2014US8652903 Access transistor for memory device
02/18/2014US8652902 Floating gate semiconductor memory device and method for producing such a device
02/18/2014US8652901 Single-mask spacer technique for semiconductor device features
02/18/2014US8652900 Trench MOSFET with ultra high cell density and manufacture thereof
02/18/2014US8652898 Integrated circuit with a thin body field effect transistor and capacitor
02/18/2014US8652897 Semiconductor memory devices and methods of fabricating the same
02/18/2014US8652896 Semiconductor memory device and fabrication process thereof
02/18/2014US8652895 Semiconductor memory device and a method of manufacturing the same
02/18/2014US8652894 Method for fabricating a FinFET device
02/18/2014US8652893 Semiconductor device and manufacturing method thereof
02/18/2014US8652892 Implant damage control by in-situ C doping during sige epitaxy for device applications
02/18/2014US8652891 Semiconductor device and method of manufacturing the same
02/18/2014US8652890 Methods for fabricating integrated circuits with narrow, metal filled openings
02/18/2014US8652889 Fin-transistor formed on a patterned STI region by late fin etch
02/18/2014US8652888 SOI device with DTI and STI
02/18/2014US8652887 Multi-layer structures and process for fabricating semiconductor devices
02/18/2014US8652886 Thin film transistor array substrate for a display panel and a method for manufacturing a thin film transistor array substrate for a display panel
02/18/2014US8652885 Method of fabricating thin film transistor
02/18/2014US8652884 Semiconductor device structure and method for manufacturing the same
02/18/2014US8652883 Methods of manufacture of bottom port surface mount silicon condenser microphone packages
02/18/2014US8652881 Integrated circuit package system with anti-peel contact pads
02/18/2014US8652880 Semiconductor device and method of manufacturing same
02/18/2014US8652879 Lead frame ball grid array with traces under die
02/18/2014US8652878 Stress-engineered interconnect packages with activator-assisted molds
02/18/2014US8652877 Method of manufacturing layered chip package
02/18/2014US8652873 Thick-film paste containing lead-vanadium-based oxide and its use in the manufacture of semiconductor devices
02/18/2014US8652872 Solar cells and method of manufacturing thereof
02/18/2014US8652870 Method of fabricating CIGS by selenization at high temperature
02/18/2014US8652869 Method for roughening substrate surface and method for manufacturing photovoltaic device
02/18/2014US8652868 Implanting method for forming photodiode
02/18/2014US8652867 Micrometer-scale grid structure based on single crystal silicon and method of manufacturing the same
02/18/2014US8652866 Sensor device and method
02/18/2014US8652865 Attaching a MEMS to a bonding wafer
02/18/2014US8652864 Solid-state image pickup device and method for producing the same
02/18/2014US8652862 Method for etching insulating film and method for manufacturing semiconductor optical device
02/18/2014US8652861 HPC optimization of contacts to optoelectronic devices
02/18/2014US8652860 Packaging photon building blocks having only top side connections in a molded interconnect structure
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