Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2006
08/17/2006WO2006085245A1 Method of forming sti regions in electronic devices
08/17/2006WO2006085189A1 Optical data transceivers
08/17/2006WO2006085021A1 Method for producing metal/semiconductor contacts through a dielectric
08/17/2006WO2006084901A1 Bonding of air-plasma treated thermoplastics
08/17/2006WO2006084825A1 Nitrogen rich barrier layers and methods of fabrication thereof
08/17/2006WO2006084524A2 PRODUCING SiC PACKS ON A WAFER PLANE
08/17/2006WO2006084509A1 Economical assembly and connection technique by means of a printing method
08/17/2006WO2006084349A1 High performance ic package and method
08/17/2006WO2006060275A3 Fore-line preconditioning for vacuum pumps
08/17/2006WO2006053241A3 Ultra-shallow arsenic junction formation in silicon germanium
08/17/2006WO2006038990A3 Method for treating a substrate
08/17/2006WO2006018820A3 Semiconductor devices and the manufacture thereof
08/17/2006WO2006018787A3 Method of detaching a thin semiconductor circuit from its base
08/17/2006WO2006012022A3 Methods and apparatus for determining endpoint in a plasma processing system
08/17/2006WO2005122706A3 Method of aligning semiconductor device and semiconductor structure thereof
08/17/2006WO2005122281A3 Gate stack of nanocrystal memory and method for forming same
08/17/2006WO2005122267A3 Growth of planar reduced dislocation density m-plane gallium nitride by hydride vapor phase epitaxy
08/17/2006WO2005114742B1 Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer
08/17/2006WO2005101367A3 Color filter integrated with sensor array for flat panel display
08/17/2006WO2005072211A3 System and method for removal of photoresist and residues following contact etch with a stop layer present
08/17/2006WO2005072200A3 System for reduction corrosion effects of metallic semiconductor structures
08/17/2006WO2005045901A3 METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES
08/17/2006WO2005038873A3 System and method for removal of photoresist in transistor fabrication for integrated circuit manufacturing
08/17/2006US20060184908 Method and program for generating layout data of a semiconductor integrated circuit and method for manufacturing a semiconductor integrated circuit with optical proximity correction
08/17/2006US20060184270 Calibration cassette pod for robot teaching and method of using
08/17/2006US20060184266 Method for making thin film devices intended for solar cells or silicon-on-insulator (SOI) applications
08/17/2006US20060184129 Catheter securement device
08/17/2006US20060184127 Catheter securement device
08/17/2006US20060184113 Protective sheath for a cannula, injection unit comprising such a sheath and needle provided with such a sheath
08/17/2006US20060183876 Resin for resist positive resist composition and method of forming resist pattern
08/17/2006US20060183412 Polishing pad
08/17/2006US20060183351 Apparatus for manufacturing liquid crystal display device
08/17/2006US20060183350 Process for fabricating semiconductor device
08/17/2006US20060183349 Semiconductor component having thinned die with polymer layers
08/17/2006US20060183348 Layered films formed by controlled phase segregation
08/17/2006US20060183347 Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry
08/17/2006US20060183346 Multilayer anti-reflective coating for semiconductor lithography and the method for forming the same
08/17/2006US20060183345 Advanced low dielectric constant organosilicon plasma chemical vapor deposition films
08/17/2006US20060183344 Barrier layer for a processing element and a method of forming the same
08/17/2006US20060183343 Oxidizing method and oxidizing unit of object for object to be processed
08/17/2006US20060183342 Metal and metal oxide patterned device
08/17/2006US20060183341 Method of forming silicon-containing insulation film having low dielectric constant and low diffusion coefficient
08/17/2006US20060183340 Coating and developing apparatus and coating and developing method
08/17/2006US20060183338 Etchant composition and manufacturing method for thin film transistor array panel
08/17/2006US20060183337 Post high voltage gate dielectric pattern plasma surface treatment
08/17/2006US20060183336 Method of optimized stitching for digital micro-mirror device
08/17/2006US20060183335 Using an electron beam to write phase change memory devices
08/17/2006US20060183334 Methods for planarization of group VIII metal-containing surfaces using oxidizing gases
08/17/2006US20060183333 Methods of fabricating semiconductor device using sacrificial layer
08/17/2006US20060183332 Method of manufacturing floating structure
08/17/2006US20060183331 Methods for patterning dielectric material, and methods for aligning semiconductor fabrication molds and semiconductor substrates
08/17/2006US20060183330 Laser assisted chemical etching method for release of microscale and nanoscale devices
08/17/2006US20060183329 Apparatus and method for reducing impurities in a semiconductor material
08/17/2006US20060183328 Electrolytic copper plating solutions
08/17/2006US20060183327 Nitrogen rich barrier layers and methods of fabrication thereof
08/17/2006US20060183326 High pressure treatment for improved grain growth and void reduction
08/17/2006US20060183325 Lift-off method
08/17/2006US20060183324 Semiconductor device and method for producing the same
08/17/2006US20060183323 Salicide process using CMP for image sensor
08/17/2006US20060183322 Deposition methods and apparatuses providing surface activation
08/17/2006US20060183321 Method for reduction of gap fill defects
08/17/2006US20060183320 Methods of filling trenches using high-density plasma deposition (HDP)
08/17/2006US20060183319 Method for manufacturing a semiconductor device
08/17/2006US20060183318 Magnetic memory cells and manufacturing methods
08/17/2006US20060183317 Semiconductor device and a method of manufacturing the same
08/17/2006US20060183316 Method of providing printed circuit board with conductive holes and board resulting therefrom
08/17/2006US20060183315 Method to create air gaps using non-plasma processes to damage ild materials
08/17/2006US20060183314 Method for Fabricating Interconnect Structures with Reduced Plasma Damage
08/17/2006US20060183313 Semiconductor package and method for manufacturing the same
08/17/2006US20060183312 Method of forming chip-type low-k dielectric layer
08/17/2006US20060183311 Method for manufacturing semiconductor devices and plug
08/17/2006US20060183310 Process for fabricating semiconductor device and method for generating mask pattern data
08/17/2006US20060183309 Method for manufacturing a patterned structure
08/17/2006US20060183308 Method of etching dual pre-doped polysilicon gate stacks using carbon-containing gases additions
08/17/2006US20060183307 Boron diffusion in silicon devices
08/17/2006US20060183306 Method for producing an electronic component with shielding
08/17/2006US20060183305 Sputter-deposited rare earth element-doped silicon oxide film with silicon nanocrystals for electroluminescence applications
08/17/2006US20060183304 Semiconductor device and method for producing the same
08/17/2006US20060183303 Crystallized semiconductor device, method for producing same and crystallization apparatus
08/17/2006US20060183302 Highly conductive shallow junction formation
08/17/2006US20060183301 Method for forming thin film
08/17/2006US20060183300 Porous structures useful as bipolar plates and methods for preparing same
08/17/2006US20060183299 Electronic device sealed under vacuum containing a getter and method of operation
08/17/2006US20060183298 Method for manufacturing a ceramic/metal substrate
08/17/2006US20060183297 Etching solution for removal of oxide film, method for preparing the same, and method of fabricating semiconductor device
08/17/2006US20060183296 Isolation method for semiconductor device
08/17/2006US20060183295 Semiconductor device having self-aligned contact and manufacturing method thereof
08/17/2006US20060183294 Methods of forming integrated circuitry
08/17/2006US20060183293 Method of forming alignment mark and method of manufacturing semiconductor device
08/17/2006US20060183292 STI liner modification method
08/17/2006US20060183291 Methods of forming capacitor structures
08/17/2006US20060183290 Manufacturing method for semiconductor device and rapid thermal annealing apparatus
08/17/2006US20060183289 Back gate FinFET SRAM
08/17/2006US20060183288 Processes for forming electronic devices including a semiconductor layer
08/17/2006US20060183287 Methods and apparatus for transmitting layered and non-layered data via layered modulation
08/17/2006US20060183286 Transistor having enlarged contact surface area and manufacturing method therefor
08/17/2006US20060183285 Method of fabricating a nonvolatile semiconductor memory
08/17/2006US20060183284 Non-volatile semiconductor storage device and the manufacturing method thereof
08/17/2006US20060183283 One time programmable EPROM for advanced CMOS technology
08/17/2006US20060183282 Method for patterning submicron pillars