H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2006
11/16/2006	WO2006119927A1 Method for producing iii-n layers, and iii-n layers or iii-n substrates, and devices based thereon
11/16/2006	WO2006119724A1 Semiconductor chips for tag applications, devices for assembling the semiconductor chips and assembly method
11/16/2006	WO2006083769A3 N2-based plasma treatment for porous low-k dielectric films
11/16/2006	WO2006074470B1 Interconnect structures with bond-pads and methods of forming bump sites on bond-pads
11/16/2006	WO2006072019A3 Electronic device and process for forming same
11/16/2006	WO2006063060A3 Device having enhanced stress state and related methods
11/16/2006	WO2005124652A3 Localizing a temperature of a device for testing
11/16/2006	WO2005109488A3 Methods of fabricating complex blade geometries from silicon wafers and strengthening blade geometries
11/16/2006	WO2005090638A8 Remote chamber methods for removing surface deposits
11/16/2006	WO2005075014A8 Catheter tip
11/16/2006	WO2004101857A3 Methods and apparatus for forming multi-layer structures using adhered masks
11/16/2006	US20060259881 Semiconductor circuit device and circuit simulation method for the same
11/16/2006	US20060259834 Method and system for debug and test using replicated logic
11/16/2006	US20060259196 Substrate carrier handler that unloads substrate carriers directly from a moving conveyor
11/16/2006	US20060259056 Surgical holder for a blood vessel
11/16/2006	US20060258809 Over-coating agent for forming fine patterns and a method of forming fine patterns using such agent
11/16/2006	US20060258327 Organic based dielectric materials and methods for minaturized RF components, and low temperature coefficient of permittivity composite devices having tailored filler materials
11/16/2006	US20060258273 Process for producing improved membranes
11/16/2006	US20060258268 Manufacturing method for semiconductor wafers, slicing method for slicing work and wire saw used for the same
11/16/2006	US20060258267 Polishing composition and polishing method using same
11/16/2006	US20060258177 Method for treating a wafer edge
11/16/2006	US20060258176 Method for forming insulation film
11/16/2006	US20060258175 Systems and methods for forming metal oxides using metal compounds containing aminosilane ligands
11/16/2006	US20060258174 Substrate treatment apparatus and method of manufacturing semiconductor device
11/16/2006	US20060258173 Precursors for CVD silicon carbo-nitride films
11/16/2006	US20060258172 Methods for forming an enriched metal oxide surface
11/16/2006	US20060258171 Selective oxidation methods and transistor fabrication methods
11/16/2006	US20060258170 Thermal processing unit
11/16/2006	US20060258169 Methods of etching oxide, reducing roughness, and forming capacitor constructions
11/16/2006	US20060258168 Methods of removing metal-containing materials
11/16/2006	US20060258167 Methods of removing metal-containing materials
11/16/2006	US20060258166 Methods of removing metal-containing materials
11/16/2006	US20060258165 Methods of removing metal-containing materials
11/16/2006	US20060258164 Method and apparatus for fabricating a memory device with a dielectric etch stop layer
11/16/2006	US20060258163 Methods of fabricating nano-scale and micro-scale mold for nano-imprint, and mold usage on nano-imprinting equipment
11/16/2006	US20060258162 Method for integrated circuit fabrication using pitch multiplication
11/16/2006	US20060258161 Methods of processing a semiconductor substrate
11/16/2006	US20060258160 Method of manufacturing semiconductor device
11/16/2006	US20060258159 Process for preparing electronics structures using a sacrificial multilayer hardmask scheme
11/16/2006	US20060258158 Polish method for semiconductor device planarization
11/16/2006	US20060258157 Deposition methods, and deposition apparatuses
11/16/2006	US20060258156 Method for forming fully silicided gates and devices obtained thereof
11/16/2006	US20060258155 Methods of forming electrically conductive plugs and method of forming resistance variable elements
11/16/2006	US20060258154 Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon
11/16/2006	US20060258153 Barrier assembly for an exposure apparatus
11/16/2006	US20060258152 Process and integration scheme for a high sidewall coverage ultra-thin metal seed layer
11/16/2006	US20060258151 Multi-layered copper line structure of semiconductor device and method for forming the same
11/16/2006	US20060258150 Oxygen bridge structures and methods to form oxygen bridge structures
11/16/2006	US20060258149 Method of manufacturing a semiconductor device
11/16/2006	US20060258148 Method for resist strip in presence of regular low k and/or porous low k dielectric materials
11/16/2006	US20060258147 Method of forming closed air gap interconnects and structures formed thereby
11/16/2006	US20060258146 Integrated circuits having organic-inorganic dielectric materials and methods for forming such integrated circuits
11/16/2006	US20060258145 Method of manufacturing a semiconductor device
11/16/2006	US20060258144 Method of forming metal interconnect for semiconductor device based on selective damascene process
11/16/2006	US20060258143 Method of reducing process steps in metal line protective structure formation
11/16/2006	US20060258142 Simultaneous deposition and etch process for barrier layer formation in microelectronic device interconnects
11/16/2006	US20060258141 Ball Film For Integrated Circuit Fabrication and Testing
11/16/2006	US20060258140 Integrated circuit with additional mini-pads connected by an under-bump metallization and method for production thereof
11/16/2006	US20060258139 Manufacturing method for wiring circuit substrate
11/16/2006	US20060258138 Methods for fabricating fluid injection devices
11/16/2006	US20060258137 Semiconductor device and fabrication method thereof
11/16/2006	US20060258136 Method of forming a metal trace
11/16/2006	US20060258135 Semiconductor integrated circuit
11/16/2006	US20060258134 Methods of forming particle-containing materials
11/16/2006	US20060258133 Method of forming micro-structures and nano-structures
11/16/2006	US20060258132 Templated cluster assembled wires
11/16/2006	US20060258131 Integrated circuitry
11/16/2006	US20060258130 Method for patterning a semiconductor component
11/16/2006	US20060258129 Isolation film in semiconductor device and method of forming the same
11/16/2006	US20060258128 Methods and apparatus for enabling multiple process steps on a single substrate
11/16/2006	US20060258127 Semiconductor device including container having epitaxial silicon therein
11/16/2006	US20060258126 Semiconductor substrate, field-effect transistor, and their production methods
11/16/2006	US20060258125 Methods of fabricating semiconductor structures having epitaxially grown source and drain elements
11/16/2006	US20060258124 Low temperature epitaxial growth of silicon-containing films using close proximity UV radiation
11/16/2006	US20060258123 Wafer gettering using relaxed silicon germanium epitaxial proximity layers
11/16/2006	US20060258122 Nanotube fuse structure
11/16/2006	US20060258121 Method of blowing the fuse structure
11/16/2006	US20060258120 Electrical/optical integration scheme using direct copper bonding
11/16/2006	US20060258119 Memory array buried digit line
11/16/2006	US20060258118 Memory array buried digit line
11/16/2006	US20060258117 Dry etching method, fabrication method for semiconductor device, and dry etching apparatus
11/16/2006	US20060258116 Shallow trench isolation
11/16/2006	US20060258115 Semiconductor device and method of manufacturing the same
11/16/2006	US20060258114 Semiconductor device and method of manufacturing the same
11/16/2006	US20060258113 Capacitor structure
11/16/2006	US20060258112 Semiconductor device having a cylindrical capacitor
11/16/2006	US20060258111 Process for producing an integrated circuit comprising a capacitor
11/16/2006	US20060258110 Method for fabricating SOI device
11/16/2006	US20060258109 DRAM cells with vertical transistors
11/16/2006	US20060258108 Semiconductor memory
11/16/2006	US20060258107 Methods of forming field effect transistors and methods of forming field effect transistor gates and gate lines
11/16/2006	US20060258106 Method of forming a gate oxide film for a high voltage region of a flash memory device
11/16/2006	US20060258105 MOS field plate trench transistor device
11/16/2006	US20060258104 Process for producing semiconductor nonvolatile memory cell array
11/16/2006	US20060258103 Methods of forming field effect transistors including floating gate field effect transistors
11/16/2006	US20060258102 Flash memory device and method of fabricating the same
11/16/2006	US20060258101 Non-volatile memory cell and method of forming the same
11/16/2006	US20060258100 Semiconductor memory device
11/16/2006	US20060258099 Semiconductor memory device and method of manufacturing the same
11/16/2006	US20060258098 Method of fabricating semiconductor device

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