Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2007
08/07/2007US7253441 Method of manufacturing thin film transistor
08/07/2007US7253439 Substrate for display, method of manufacturing the same and display having the same
08/07/2007US7253437 Display device having a thin film transistor
08/07/2007US7253433 Organic electroluminescent device, method of manufacturing the same, and electronic apparatus
08/07/2007US7253429 Electrically programmable memory element
08/07/2007US7253424 Method of implanting a substrate and an ion implanter for performing the method
08/07/2007US7253419 Apertured plate support mechanism and charged-particle beam instrument equipped therewith
08/07/2007US7253409 Electrochemical nano-patterning using ionic conductors
08/07/2007US7253390 Methods for packaging microelectronic imagers
08/07/2007US7253388 Assembly with self-alignment features to position a cover on a substrate that supports a micro component
08/07/2007US7253125 Method to improve mechanical strength of low-k dielectric film using modulated UV exposure
08/07/2007US7253124 Process for defect reduction in electrochemical plating
08/07/2007US7253123 Method for producing gate stack sidewall spacers
08/07/2007US7253122 Systems and methods for forming metal oxides using metal diketonates and/or ketoimines
08/07/2007US7253121 Method for forming IMD films
08/07/2007US7253120 Selectable area laser assisted processing of substrates
08/07/2007US7253119 Passivated nanoparticles, method of fabrication thereof, and devices incorporating nanoparticles
08/07/2007US7253118 Pitch reduced patterns relative to photolithography features
08/07/2007US7253117 Methods for use of pulsed voltage in a plasma reactor
08/07/2007US7253116 High ion energy and reative species partial pressure plasma ash process
08/07/2007US7253115 Dual damascene etch processes
08/07/2007US7253114 Self-aligned method for defining a semiconductor gate oxide in high voltage device area
08/07/2007US7253113 Methods for using a silylation technique to reduce cell pitch in semiconductor devices
08/07/2007US7253112 Dual damascene process
08/07/2007US7253111 Barrier polishing solution
08/07/2007US7253110 Method and apparatus for forming a barrier metal layer in semiconductor devices
08/07/2007US7253109 Method of depositing a tantalum nitride/tantalum diffusion barrier layer system
08/07/2007US7253108 Process for forming a thin film of TiSiN, in particular for phase change memory devices
08/07/2007US7253107 Pressure control system
08/07/2007US7253106 Manufacturable CoWP metal cap process for copper interconnects
08/07/2007US7253105 Reliable BEOL integration process with direct CMP of porous SiCOH dielectric
08/07/2007US7253104 Methods of forming particle-containing materials
08/07/2007US7253103 Method for producing semiconductor devices that includes forming a copper film in contact with a ruthenium film
08/07/2007US7253102 Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers
08/07/2007US7253101 Deposition method of TiN thin film having a multi-layer structure
08/07/2007US7253099 Method of manufacturing semiconductor device that includes forming self-aligned contact pad
08/07/2007US7253098 Maintaining uniform CMP hard mask thickness
08/07/2007US7253097 Integrated circuit system using dual damascene process
08/07/2007US7253096 Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
08/07/2007US7253095 Air gap formation method for reducing undesired capacitive coupling between interconnects in an integrated circuit device
08/07/2007US7253094 Methods for cleaning contact openings to reduce contact resistance
08/07/2007US7253093 Method for fabricating interconnection in an insulating layer on a wafer
08/07/2007US7253092 Tungsten plug corrosion prevention method using water
08/07/2007US7253091 Process for assembling three-dimensional systems on a chip and structure thus obtained
08/07/2007US7253090 Chip scale surface mounted device and process of manufacture
08/07/2007US7253089 Microfeature devices and methods for manufacturing microfeature devices
08/07/2007US7253088 Stress-relief layers and stress-compensation collars with low-temperature solders for board-level joints, and processes of making same
08/07/2007US7253087 Method of producing thin-film device, electro-optical device, and electronic apparatus
08/07/2007US7253086 Recessed drain extensions in transistor device
08/07/2007US7253085 Deposition methods
08/07/2007US7253084 Deposition from liquid sources
08/07/2007US7253083 Method of thinning a semiconductor structure
08/07/2007US7253082 Pasted SOI substrate, process for producing the same and semiconductor device
08/07/2007US7253081 Surface finishing of SOI substrates using an EPI process
08/07/2007US7253080 Silicon-on-insulator semiconductor wafer
08/07/2007US7253078 Method and apparatus for forming an underfill adhesive layer
08/07/2007US7253077 Substrate, method of preparing a substrate, method of measurement, lithographic apparatus, device manufacturing method and device manufactured thereby, and machine-readable storage medium
08/07/2007US7253076 Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers
08/07/2007US7253075 Semiconductor device and method for manufacturing the same
08/07/2007US7253074 Temperature-compensated resistor and fabrication method therefor
08/07/2007US7253073 Structure and method for hyper-abrupt junction varactors
08/07/2007US7253072 Implant optimization scheme
08/07/2007US7253071 Methods for enhancing the formation of nickel mono-silicide by reducing the formation of nickel di-silicide
08/07/2007US7253070 Transistor structure with minimized parasitics and method of fabricating the same
08/07/2007US7253069 Method for manufacturing silicon-on-insulator wafer
08/07/2007US7253068 Dual SOI film thickness for body resistance control
08/07/2007US7253067 Method for manufacturing a semiconductor device including a shallow trench isolation structure
08/07/2007US7253066 MOSFET with decoupled halo before extension
08/07/2007US7253065 Self-aligned nanotube field effect transistor and method of fabricating same
08/07/2007US7253064 Cascode I/O driver with improved ESD operation
08/07/2007US7253063 Method of fabricating a composite gate dielectric layer
08/07/2007US7253062 Semiconductor device with asymmetric pocket implants
08/07/2007US7253061 Method of forming a gate insulator in group III-V nitride semiconductor devices
08/07/2007US7253060 Gate-all-around type of semiconductor device and method of fabricating the same
08/07/2007US7253059 Method of forming an integrated circuit with multi-length power transistor segments
08/07/2007US7253058 Method of manufacturing NOR-type mask ROM device and semiconductor device including the same
08/07/2007US7253057 Memory cell with reduced size and standby current
08/07/2007US7253056 Flash memory cell and method for manufacturing the same
08/07/2007US7253055 Pillar cell flash memory technology
08/07/2007US7253054 One time programmable EPROM for advanced CMOS technology
08/07/2007US7253053 Methods of forming transistor devices and capacitor constructions
08/07/2007US7253052 Method for forming a storage cell capacitor compatible with high dielectric constant materials
08/07/2007US7253051 Semiconductor integrated circuit device and process for manufacturing the same
08/07/2007US7253050 Transistor device and method of manufacture thereof
08/07/2007US7253049 Method for fabricating dual work function metal gates
08/07/2007US7253048 Method of manufacturing a semiconductor integrated circuit and semiconductor integrated circuit
08/07/2007US7253047 Semiconductor processing methods of forming transistors, semiconductor processing methods of forming dynamic random access memory circuitry, and related integrated circuitry
08/07/2007US7253046 Semiconductor memory device and manufacturing method thereof
08/07/2007US7253044 Manufacturing method for semiconductor device
08/07/2007US7253043 Short channel semiconductor device fabrication
08/07/2007US7253042 Method of fabricating a high-voltage transistor with an extended drain structure
08/07/2007US7253041 Method of forming a thin film transistor
08/07/2007US7253040 Fabrication method of semiconductor device
08/07/2007US7253039 Method of manufacturing CMOS transistor by using SOI substrate
08/07/2007US7253038 Semiconductor device and method for manufacturing the same
08/07/2007US7253037 Method of fabricating thin film transistor
08/07/2007US7253036 Method of forming gate insulation film using plasma method of fabricating poly-silicon thin film transistor using the same
08/07/2007US7253035 Thin film transistor array panel and manufacturing method thereof
08/07/2007US7253034 Dual SIMOX hybrid orientation technology (HOT) substrates
08/07/2007US7253033 Method of manufacturing a semiconductor device that includes implanting in multiple directions a high concentration region
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