Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2008
06/24/2008US7391049 Thin-film transistor, thin-film transistor sheet and their manufacturing method
06/24/2008US7391036 Sample surface inspection apparatus and method
06/24/2008US7391024 Steady-state non-equilibrium distribution of free carriers and photon energy up-conversion using same
06/24/2008US7391023 Lithography tool image quality evaluating and correcting
06/24/2008US7391001 Thin lightshield process for solid-state image sensors
06/24/2008US7390758 Method of manufacturing a semiconductor integrated circuit device with elimination of static charge
06/24/2008US7390757 Methods for improving low k FSG film gap-fill characteristics
06/24/2008US7390756 Atomic layer deposited zirconium silicon oxide films
06/24/2008US7390755 Methods for post etch cleans
06/24/2008US7390754 Method of forming a silicide
06/24/2008US7390753 In-situ plasma treatment of advanced resists in fine pattern definition
06/24/2008US7390752 Self-aligning patterning method
06/24/2008US7390751 Dry etching method and apparatus for performing dry etching
06/24/2008US7390750 Method of patterning elements within a semiconductor topography
06/24/2008US7390749 Self-aligned pitch reduction
06/24/2008US7390748 Method of forming a polishing inhibiting layer using a slurry having an additive
06/24/2008US7390747 Nitride semiconductor substrate and method of producing same
06/24/2008US7390746 Multiple deposition for integration of spacers in pitch multiplication process
06/24/2008US7390745 Pattern enhancement by crystallographic etching
06/24/2008US7390744 Method and composition for polishing a substrate
06/24/2008US7390743 Methods for forming a structured tungsten layer and forming a semiconductor device using the same
06/24/2008US7390742 Method for producing a rewiring printed circuit board
06/24/2008US7390741 Method for fabricating semiconductor device
06/24/2008US7390740 Sloped vias in a substrate, spring-like contacts, and methods of making
06/24/2008US7390739 Formation of a masking layer on a dielectric region to facilitate formation of a capping layer on electrically conductive regions separated by the dielectric region
06/24/2008US7390738 Fabrication of semiconductor devices using anti-reflective coatings
06/24/2008US7390737 Method for filling a contact hole and integrated circuit arrangement with contact hole
06/24/2008US7390736 EMI and noise shielding for multi-metal layer high frequency integrated circuit processes
06/24/2008US7390735 High temperature, stable SiC device interconnects and packages having low thermal resistance
06/24/2008US7390734 Thin film transistor substrate and manufacturing method thereof
06/24/2008US7390733 Method of manufacturing a semiconductor device including a protruding electrode bonded to a lead electrode
06/24/2008US7390732 Method for producing a semiconductor device with pyramidal bump electrodes bonded onto pad electrodes arranged on a semiconductor chip
06/24/2008US7390731 Method of depositing an oxide layer on a substrate and a photovoltaic cell using said substrate
06/24/2008US7390730 Method of fabricating a body capacitor for SOI memory
06/24/2008US7390729 Method of fabricating a semiconductor device
06/24/2008US7390728 Display device and manufacturing method thereof
06/24/2008US7390727 Polycrystalline silicon film containing Ni
06/24/2008US7390726 Switching ratio and on-state resistance of an antifuse programmed below 5 mA and having a Ta or TaN barrier metal layer
06/24/2008US7390725 Strained silicon on insulator from film transfer and relaxation by hydrogen implantation
06/24/2008US7390724 Method and system for lattice space engineering
06/24/2008US7390723 Alignment method of using alignment marks on wafer edge
06/24/2008US7390722 System and method for using an oxidation process to create a stepper alignment structure on semiconductor wafers
06/24/2008US7390721 Methods of base formation in a BiCMOS process
06/24/2008US7390720 Local collector implant structure for heterojunction bipolar transistors and method of forming the same
06/24/2008US7390719 Method of manufacturing a semiconductor device having a dual gate structure
06/24/2008US7390718 SONOS embedded memory with CVD dielectric
06/24/2008US7390717 Trench power MOSFET fabrication using inside/outside spacers
06/24/2008US7390716 Method of manufacturing flash memory device
06/24/2008US7390715 Method of fabricating active layer thin film by metal chalcogenide precursor solution
06/24/2008US7390714 Method of manufacturing semiconductor device having tungsten gates electrode
06/24/2008US7390713 Method for forming trench memory cell structures for DRAMS
06/24/2008US7390712 Methods of enhancing capacitors in integrated circuits
06/24/2008US7390711 MOS transistor and manufacturing method thereof
06/24/2008US7390710 Protection of tunnel dielectric using epitaxial silicon
06/24/2008US7390709 Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode
06/24/2008US7390708 Patterning of doped poly-silicon gates
06/24/2008US7390707 Semiconductor device fabrication method
06/24/2008US7390706 Method of forming channel region of TFT composed of single crystal Si
06/24/2008US7390705 Method for crystallizing amorphous semiconductor thin film by epitaxial growth using non-metal seed and method for fabricating poly-crystalline thin film transistor using the same
06/24/2008US7390704 Laser process apparatus, laser irradiation method, and method for manufacturing semiconductor device
06/24/2008US7390703 Method for through-plating field effect transistors with a self-assembled monolayer of an organic compound as gate dielectric
06/24/2008US7390702 Method for manufacturing semiconductor device
06/24/2008US7390701 Method of forming a digitalized semiconductor structure
06/24/2008US7390700 Packaged system of semiconductor chips having a semiconductor interposer
06/24/2008US7390699 Integrated circuit die connection methods and apparatus
06/24/2008US7390698 Packaged semiconductor device and method of manufacture using shaped die
06/24/2008US7390697 Enhanced adhesion strength between mold resin and polyimide
06/24/2008US7390696 Wafer, semiconductor device, and fabrication methods therefor
06/24/2008US7390695 Diamond substrate and manufacturing method thereof
06/24/2008US7390692 Semiconductor device and method for manufacturing the same
06/24/2008US7390691 Increasing phase change memory column landing margin
06/24/2008US7390689 Systems and methods for light absorption and field emission using microstructured silicon
06/24/2008US7390688 Semiconductor device and manufacturing method thereof
06/24/2008US7390687 Microelectronic imagers with shaped image sensors and methods for manufacturing microelectronic imagers
06/24/2008US7390686 CMOS image sensor and method for fabricating the same
06/24/2008US7390685 Ultra-shallow photodiode using indium
06/24/2008US7390684 Light emitting apparatus and method of manufacturing the same
06/24/2008US7390683 Method of manufacturing a semiconductor device including a slab layer with a periodic air hole structure and a linear defect region
06/24/2008US7390682 Method for testing metal-insulator-metal capacitor structures under high temperature at wafer level
06/24/2008US7390681 Derived metric for monitoring die placement
06/24/2008US7390680 Method to selectively identify reliability risk die based on characteristics of local regions on the wafer
06/24/2008US7390679 Method for manufacturing ferroelectric memory device
06/24/2008US7390678 Method for fabricating semiconductor device
06/24/2008US7390615 Integrated circuit fuse and method of opening
06/24/2008US7390614 Lithographic apparatus and device manufacturing method
06/24/2008US7390612 Copolymers of (meth)acrylic esters containing an adamantyl, 1,4-methanonaphthyl, 1,4:5,8-dimethanonaphthyl, 4,7-methanoindanyl, or 4,7-methanoisobenzofuranyl moiety as a dissolution inhibitor, an acid generator and a polar solvent; improved edge and surface smoothness, resolution and depth of focus range
06/24/2008US7390609 have non-carbon tetravalent species (Si, Ti, Ge, Zr, Sn) and photoresists that comprise such polymers; component of resists imaged at short wavelengths
06/24/2008US7390608 the polymer has a controlled ratio of silanol groups to Si atoms of 0.01 to 1.5., especially from trichlorosilanes with fluoroalcohol, fluoromethylsulfonamide, or fluorocarboxylic acid groups and a norbornane ring
06/24/2008US7390596 Reflection type mask blank and reflection type mask and production methods for them
06/24/2008US7390568 Semiconductor nanocrystal heterostructures having specific charge carrier confinement
06/24/2008US7390423 applying slurries comprising carrier fluids, particles, etchants and surfactants, to the surfaces of glass, ceramic, metal or alloy substrates use in data storage, then rubbing with pads
06/24/2008US7390371 coating microstructure optical electromechanical systems comprising indium phosphide or indium gallium arsenide with surface binders comprising calcium and hexane, then insertion into ceramic substrates and firing
06/24/2008US7390370 Gold bonding wires for semiconductor devices and method of producing the wires
06/24/2008US7390367 Housing assembly for an induction heating device including liner or susceptor coating
06/24/2008US7390366 Apparatus for chemical vapor deposition
06/24/2008US7390365 Developing method, substrate treating method, and substrate treating apparatus
06/24/2008US7390359 Nitride semiconductor wafer
06/24/2008US7390129 Light source, method for manufacturing light source, and projector
06/24/2008US7389944 Edge remover having a gas sprayer to prevent a chemical solvent from splashing
06/24/2008US7389903 Device and method for soldering contacts on semiconductor chips