Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2008
06/26/2008US20080153031 Resist composition
06/26/2008US20080153009 Exposure mask, optical proximity correction device, optical proximity correction method, manufacturing method of semiconductor device, and optical proximity correction program
06/26/2008US20080152952 Organic spin transport device
06/26/2008US20080152891 Doped aluminum oxide dielectrics
06/26/2008US20080152873 EUV pellicle and method for fabricating semiconductor dies using same
06/26/2008US20080152839 Electron device having electrode made of metal that is familiar with carbon
06/26/2008US20080152838 Hardware development to reduce bevel deposition
06/26/2008US20080152568 feeding inert gases, water vapor and silicon melts to a crystallization zone according to the edge-defined film-fed growth (EFG) process using a shaping tool; polycrystalline silicon films used in solar cells or as wafers
06/26/2008US20080152474 Method for Positioning a Wafer
06/26/2008US20080152464 Methods, apparatuses, and systems for fabricating three dimensional integrated circuits
06/26/2008US20080152463 Wafer processing system with dual wafer robots capable of asynchronous motion
06/26/2008US20080151955 Etched-facet ridge lasers with etch-stop
06/26/2008US20080151950 Multiwavelength semiconductor laser array and method of fabricating the same
06/26/2008US20080151614 Spin transfer MRAM device with magnetic biasing
06/26/2008US20080151596 Three-dimensional magnetic memory
06/26/2008US20080151592 Semiconductor device and method of fabricating a semiconductor device
06/26/2008US20080151522 Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
06/26/2008US20080151520 Multilayer printed circuit board and multilayer printed circuit board manufacturing method
06/26/2008US20080151519 Multilayer printed circuit board and multilayer printed circuit board manufacturing method
06/26/2008US20080151517 Multilayer printed circuit board and multilayer printed circuit board manufacturing method
06/26/2008US20080151473 Electronic components and a method of manufacturing the same
06/26/2008US20080151468 Substrates with slotted metals and related methods
06/26/2008US20080151466 Electrostatic chuck and method of forming
06/26/2008US20080151271 Method for monitoring film thickness, a system for monitoring film thickness, a method for manufacturing a semiconductor device, and a program product for controlling film thickness monitoring system
06/26/2008US20080151269 Model and parameter selection for optical metrology
06/26/2008US20080151262 Light Exposure Apparatus and Manufacturing Method of Semiconductor Device Using the Same
06/26/2008US20080151230 Pattern inspection method
06/26/2008US20080151160 Transflective liquid crystal display using separate transmissive and reflective liquid crystal cells and materials with single cell gap
06/26/2008US20080151159 Transflective liquid crystal display device and fabrication method thereof
06/26/2008US20080151150 Liquid crystal display panel and method for manufacturing thereof
06/26/2008US20080151136 Liquid crystal display device and fabrication method thereof
06/26/2008US20080150586 Semiconductor device, method of manufacturing same, and apparatus for designing same
06/26/2008US20080150435 Display devices with organic light emitting layers
06/26/2008US20080150434 Display device and method of manufacturing the same
06/26/2008US20080150170 Capillary-flow underfill compositions, packages containing same, and systems containing same
06/26/2008US20080150166 Method for forming metal wiring in semiconductor device
06/26/2008US20080150165 Selective processing of semiconductor nanowires by polarized visible radiation
06/26/2008US20080150164 Carrier structure embedded with semiconductor chips and method for manufacturing the same
06/26/2008US20080150161 Semiconductor Device and Method of Protecting Passivation Layer in a Solder Bump Process
06/26/2008US20080150160 Dicing technique for flip-chip usp wafers
06/26/2008US20080150159 Semiconductor Package with Perforated Substrate
06/26/2008US20080150158 Integrated circuit package system with offset stacked die
06/26/2008US20080150157 Semiconductor device and manufacturing method of the same
06/26/2008US20080150156 Stacked die package with stud spacers
06/26/2008US20080150155 Stacked-die packages with silicon vias and surface activated bonding
06/26/2008US20080150154 Method for fabricating a circuit
06/26/2008US20080150153 Single mask via method and device
06/26/2008US20080150152 Carbon nanotube-based interconnection element
06/26/2008US20080150151 Multilayered Interconnect Structure and Method for Fabricating the Same
06/26/2008US20080150150 System and method for filling vias
06/26/2008US20080150148 Methods of patterning a deposit metal on a substrate
06/26/2008US20080150146 Semiconductor device and method of fabricating the same
06/26/2008US20080150145 Adhesion and electromigration performance at an interface between a dielectric and metal
06/26/2008US20080150144 Guard ring in semiconductor device and fabricating method thereof
06/26/2008US20080150142 Multilevel wiring, laminated aluminum wiring, semiconductor device and manufacturing method of the same
06/26/2008US20080150141 Manufacturing method for an integrated semiconductor structure and corresponding semiconductor structure
06/26/2008US20080150140 Semiconductor device and method of manufacturing the same
06/26/2008US20080150139 Semiconductor Device and Method of Manufacturing the Same
06/26/2008US20080150138 Process integration scheme to lower overall dielectric constant in BEoL interconnect structures
06/26/2008US20080150137 Interconnect Capping Layer and Method of Fabrication
06/26/2008US20080150136 Integrated circuit having a metal element
06/26/2008US20080150135 Mounting method for semiconductor parts on circuit substrate
06/26/2008US20080150133 Semiconductor Chip Assembly And Fabrication Method Therefor
06/26/2008US20080150132 Stack up pcb substrate for high density interconnect packages
06/26/2008US20080150131 Semiconductor device manufactured by reducing hillock formation in metal interconnects
06/26/2008US20080150128 Heat dissipating chip structure and fabrication method thereof and package having the same
06/26/2008US20080150127 Microelectronic package, method of manufacturing same, and system containing same
06/26/2008US20080150125 Thermal management of dies on a secondary side of a package
06/26/2008US20080150124 Semiconductor Device Comprising A Plastic Housing, A Semiconductor Chip and an Interposer, and Method For Producing the Same
06/26/2008US20080150122 Routing density through asymmetric array of vias
06/26/2008US20080150121 Microelectronic assemblies having compliancy and methods therefor
06/26/2008US20080150119 Integrated circuit package system employing mold flash prevention technology
06/26/2008US20080150118 Method of Manufacturing a Semiconductor Packages and Packages Made
06/26/2008US20080150114 Stacking packages with alignment elements
06/26/2008US20080150113 Enabling uniformity of stacking process through bumpers
06/26/2008US20080150108 Semiconductor package and method for manufacturing same
06/26/2008US20080150106 Inverted lf in substrate
06/26/2008US20080150105 Power Semiconductor Component Stack Using Lead Technology with Surface-Mountable External Contacts and a Method for Producing the Same
06/26/2008US20080150104 Leadframe with different topologies for mems package
06/26/2008US20080150103 Multi-Die Ic Package and Manufacturing Method
06/26/2008US20080150102 Semiconductor device and manufacturing method of semiconductor device
06/26/2008US20080150099 Local control of underfill flow on high density packages, packages and systems made therewith, and methods of making same
06/26/2008US20080150094 Flip chip shielded RF I/O land grid array package
06/26/2008US20080150093 Shielded stacked integrated circuit package system
06/26/2008US20080150091 MULTIPLE PATTERNING USING PATTERNABLE LOW-k DIELECTRIC MATERIALS
06/26/2008US20080150089 Semiconductor device having through vias and method of manufacturing the same
06/26/2008US20080150088 Method for incorporating existing silicon die into 3d integrated stack
06/26/2008US20080150087 Semiconductor chip shape alteration
06/26/2008US20080150086 Nitride based semiconductor device and process for preparing the same
06/26/2008US20080150085 Gruppe-iii-nitrid-halbleiterbauelement mit hoch p-leitfahiger schicht
06/26/2008US20080150084 Phosphorus-Stabilized Transition Metal Oxide Diffusion Barrier
06/26/2008US20080150083 Semiconductor Device and Method of Manufacturing the Same
06/26/2008US20080150081 Semiconductor device
06/26/2008US20080150078 Integrated dram process/structure using contact pillars
06/26/2008US20080150077 Semiconductor Device and Fabricating Method Thereof
06/26/2008US20080150075 Method and resultant structure for floating body memory on bulk wafer
06/26/2008US20080150074 Integrated circuit system with isolation
06/26/2008US20080150073 Integrated circuit including a charge compensation component
06/26/2008US20080150064 Plastic electronic component package
06/26/2008US20080150063 Process for making contact with and housing integrated circuits