Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
07/2008
07/31/2008US20080182385 Method for producing semiconductor device
07/31/2008US20080182384 Fabrication method of nitride-based semiconductor device
07/31/2008US20080182383 Method of removing an oxide and method of filling a trench using the same
07/31/2008US20080182382 Methods of thin film process
07/31/2008US20080182381 Manufacturing method of semiconductor device using sti technique
07/31/2008US20080182380 Method for manufacturing semiconductor device
07/31/2008US20080182379 Semiconductor Wafer With Low-K Dielectric Layer and Process For Fabrication Thereof
07/31/2008US20080182378 Method of producing an integrated circuit having a capacitor
07/31/2008US20080182377 Method of forming a multi-bit nonvolatile memory device
07/31/2008US20080182376 Method of fabricating super trench MOSFET including buried source electrode
07/31/2008US20080182375 Split gate memory cell method
07/31/2008US20080182374 Non-volatile semiconductor memory device
07/31/2008US20080182373 Method for Integrally Forming an Electrical Fuse Device and a MOS Transistor
07/31/2008US20080182372 Method of forming disposable spacers for improved stressed nitride film effectiveness
07/31/2008US20080182371 Method for forming silicon/germanium containing drain/source regions in transistors with reduced silicon/germanium loss
07/31/2008US20080182370 Methods for fabricating low contact resistance cmos circuits
07/31/2008US20080182369 T-gate forming method and metamorphic high electron mobility transistor fabricating method using the same
07/31/2008US20080182368 Method for production of thin-film semiconductor device
07/31/2008US20080182367 Embedded memory in a cmos circuit and methods of forming the same
07/31/2008US20080182366 Hybrid module and method of manufacturing the same
07/31/2008US20080182365 Die package with asymmetric leadframe connection
07/31/2008US20080182364 Integrated Circuit Device Package Having Both Wire Bond and Flip-Chip Interconnections and Method of Making the Same
07/31/2008US20080182363 Method for forming a microelectronic assembly including encapsulating a die using a sacrificial layer
07/31/2008US20080182362 Method for precision assembly of integrated circuit chip packages
07/31/2008US20080182361 Techniques for providing decoupling capacitance
07/31/2008US20080182360 Fabrication method of semiconductor package
07/31/2008US20080182359 Techniques for providing decoupling capacitance
07/31/2008US20080182358 Process for atomic layer deposition
07/31/2008US20080182355 Conducting layer in chip package module
07/31/2008US20080182353 Method for fabricating light emitting diodes
07/31/2008US20080182352 Array substrate for LCD device having double-layered metal structure and manufacturing method thereof
07/31/2008US20080182351 Liquid crystal display device and manufacturing method thereof
07/31/2008US20080182349 Method for manufacturing display device
07/31/2008US20080182348 Impurity Introducing Method, Impurity Introducing Apparatus, and Electronic Device Produced by Using Those
07/31/2008US20080182347 Methods for monitoring ion implant process in bond and cleave, silicon-on-insulator (SOI) wafer manufacturing
07/31/2008US20080182346 Method for reducing etch-induced process uniformities by omitting deposition of an endpoint detection layer during patterning of stressed overlayers in a semiconductor device
07/31/2008US20080182345 Substrate processing method and semiconductor manufacturing apparatus
07/31/2008US20080182344 Method and system for determining deformations on a substrate
07/31/2008US20080182343 Real-Time Parameter Tuning Using Wafer Temperature
07/31/2008US20080182342 Magnetic Tunnel Barriers and Associated Magnetic Tunnel Junctions with High Tunneling Magnetoresistance
07/31/2008US20080182335 chromatographically analyzing a fluid stream generated during a process employed for device fabrication, e.g., during a wet strip, a chemical mechanical planarization process; endpoint detection; detecting a hydrocarbon to silanol ratio
07/31/2008US20080182211 Using a coating and developing apparatus and a connected aligner; reduced operator workloads; photolithography
07/31/2008US20080182209 Method of Fabricating Semiconductor Device, and Developing Apparatus Using the Method
07/31/2008US20080182105 Production of Core/Shell Semiconductor Nanocrystals In Aqueous Solutions
07/31/2008US20080182075 Phosphorus Containing Si Epitaxial Layers in N-Type Source/Drain Junctions
07/31/2008US20080182070 Method of manufacturing an imprinting template using a semiconductor manufacturing process and the imprinting template obtained
07/31/2008US20080182068 Nanotransfer and nanoreplication using deterministically grown sacrificial nanotemplates
07/31/2008US20080181752 Substrate positioning device and substrate positioning method
07/31/2008US20080181751 Electronic component handler having gap set device
07/31/2008US20080181750 Gate valve cleaning method and substrate processing system
07/31/2008US20080181558 Electronic and optical circuit integration through wafer bonding
07/31/2008US20080181279 Optical device and system and method for fabricating the device
07/31/2008US20080180995 Semiconductor Device With Electrically Floating Body
07/31/2008US20080180986 Semiconductor device and method for manufacturing the same
07/31/2008US20080180985 Ferroelectric media structure for ferroelectric hard disc drive and method of fabricating the same
07/31/2008US20080180982 Stacked 1T-nmemory cell structure
07/31/2008US20080180924 Microwave surface mount hermetically sealed package and method of forming the same
07/31/2008US20080180919 Semiconductor module, module substrate structure, and method of fabricating the same
07/31/2008US20080180878 Package structure with embedded capacitor, fabricating process thereof and applications of the same
07/31/2008US20080180873 Securing a substrate to an electrostatic chuck
07/31/2008US20080180871 Structure and method for self protection of power device
07/31/2008US20080180695 Unevenness elimination end-point detecting apparatus and unevenness elimination end-point detecting method for CMP apparatus
07/31/2008US20080180668 Marker structure for optical alignment of a substrate, a substrate including such a marker structure, an alignment method for aligning to such a marker structure, and a lithographic projection apparatus
07/31/2008US20080180647 Focus monitor mark, focus monitoring method, and device production method
07/31/2008US20080180645 Immersion Photolithography System and Method Using Microchannel Nozzles
07/31/2008US20080180628 Method and apparatus for producing electro-optical device
07/31/2008US20080180590 Liquid crystal display panel
07/31/2008US20080180516 Mems mirror system for laser printing applications
07/31/2008US20080180376 Driving circuit for a liquid crystal display device, method of manufacturing the same and display device having the same
07/31/2008US20080180357 Plasma processing apparatus
07/31/2008US20080180186 Piezoelectric oscillator and method for manufacturing the same
07/31/2008US20080180160 High voltage dual gate cmos switching device and method
07/31/2008US20080180121 Probe card assembly and kit
07/31/2008US20080179988 Mems device and fabrication method of the same
07/31/2008US20080179762 Layered structure with laser-induced aggregation silicon nano-dots in a silicon-rich dielectric layer, and applications of the same
07/31/2008US20080179759 Method for manufacturing semiconductor device, semiconductor device, electro-optical device, and electronic apparatus
07/31/2008US20080179758 Stacked integrated circuit assembly
07/31/2008US20080179757 Stacked semiconductor device and method of manufacturing the same
07/31/2008US20080179756 Semiconductor structures including conductive vias and methods of making semiconductor structures
07/31/2008US20080179755 Structure and method for creating reliable deep via connections in a silicon carrier
07/31/2008US20080179753 Semiconductor device having thermally formed air gap in wiring layer and method of fabricating same
07/31/2008US20080179752 Method of making semiconductor device and semiconductor device
07/31/2008US20080179751 Manufacturing method of semiconductor devices and semiconductor device manufactured thereby
07/31/2008US20080179750 Interconnections of an integrated electronic circuit
07/31/2008US20080179747 Method of manufacturing semiconductor apparatus, and semiconductor apparatus
07/31/2008US20080179746 Wiring structures of semiconductor devices and methods of forming the same
07/31/2008US20080179743 Electrode, method for producing same and semiconductor device using same
07/31/2008US20080179739 Flip chip package with anti-floating structure
07/31/2008US20080179736 Chip cooling channels formed in wafer bonding gap
07/31/2008US20080179734 Stacked package, method of manufacturing the same, and memory card having the stacked package
07/31/2008US20080179733 Semiconductor multi-package module including tape substrate land grid array package stacked over ball grid array package
07/31/2008US20080179732 Working Method of Metal Material and Semiconductor Apparatus Fabricated by the Method
07/31/2008US20080179730 Wafer Level CSP Packaging Concept
07/31/2008US20080179727 Semiconductor packages having immunity against void due to adhesive material and methods of fabricating the same
07/31/2008US20080179726 Multi-chip semiconductor package and method for fabricating the same
07/31/2008US20080179716 Multilevel interconnects structure with shielding function and fabricating method thereof
07/31/2008US20080179715 Shallow trench isolation using atomic layer deposition during fabrication of a semiconductor device
07/31/2008US20080179714 Integrated multiple gate dielectric composition and thickness semiconductor chip and method of manufacturing the same
07/31/2008US20080179713 Etching Technique For Creation of Thermally-Isolated Microstructures
07/31/2008US20080179712 Structure and method to form semiconductor-on-pores (sop) for high device performance and low manufacturing cost