Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2008
08/26/2008US7418694 Method for generating test patterns utilized in manufacturing semiconductor device
08/26/2008US7418688 Routing analysis method, logic synthesis method and circuit partitioning method for integrated circuit
08/26/2008US7418685 Layout method for miniaturized memory array area
08/26/2008US7418363 Micropattern measuring method, micropattern measuring apparatus, and computer-readable recording medium on which a micropattern measuring program is recorded
08/26/2008US7418125 Position detection technique
08/26/2008US7418124 Qualifying patterns, patterning processes, or patterning apparatus in the fabrication of microlithographic patterns
08/26/2008US7417838 Semiconductor integrated circuit
08/26/2008US7417723 Method of inspecting a semiconductor device and an apparatus thereof
08/26/2008US7417720 Lighting optical machine and defect inspection system
08/26/2008US7417711 Lithographic apparatus and device manufacturing method
08/26/2008US7417705 Liquid crystal display device and method for fabricating the same
08/26/2008US7417694 Thin film transistor array panel and liquid crystal display including the panel
08/26/2008US7417693 Liquid crystal display device and its manufacturing method
08/26/2008US7417445 Probing method and prober for measuring electrical characteristics of circuit devices
08/26/2008US7417442 Method and apparatus for testing tunnel magnetoresistive effect element, manufacturing method of tunnel magnetoresistive effect element and tunnel magnetoresistive effect element
08/26/2008US7417325 Semiconductor component having thinned die with conductive vias configured as conductive pin terminal contacts
08/26/2008US7417324 Semiconductor device and method for manufacturing the same
08/26/2008US7417323 Neo-wafer device and method
08/26/2008US7417322 Multi-chip module with embedded package and method for manufacturing the same
08/26/2008US7417319 Semiconductor device with connecting via and dummy via and method of manufacturing the same
08/26/2008US7417316 Wired circuit forming board, wired circuit board, and thin metal layer forming method
08/26/2008US7417315 Negative thermal expansion system (NTEs) device for TCE compensation in elastomer composites and conductive elastomer interconnects in microelectronic packaging
08/26/2008US7417313 Method for manufacturing an adhesive substrate with a die-cavity sidewall
08/26/2008US7417311 Semiconductor device and method of fabricating the same
08/26/2008US7417308 Stack type package module and method for manufacturing the same
08/26/2008US7417301 Semiconductor component with coreless transformer
08/26/2008US7417299 Direct connection multi-chip semiconductor element structure
08/26/2008US7417298 High voltage insulated-gate transistor
08/26/2008US7417297 Film or layer of semiconducting material, and process for producing the film or layer
08/26/2008US7417296 Dielectric isolation type semiconductor device
08/26/2008US7417295 Insulated gate semiconductor device and manufacturing method thereof
08/26/2008US7417293 Image sensor packaging structure
08/26/2008US7417291 Method for manufacturing semiconductor integrated circuit device
08/26/2008US7417290 Air break for improved silicide formation with composite caps
08/26/2008US7417289 Semiconductor device having internal stress film
08/26/2008US7417285 Semiconductor device having a trench capacitor and a MOSFET connected by a diffusion layer and manufacturing method thereof
08/26/2008US7417281 Semiconductor device with a selection gate and a peripheral gate
08/26/2008US7417280 Method and apparatus for a flash memory device comprising a source local interconnect
08/26/2008US7417278 Method to increase coupling ratio of source to floating gate in split-gate flash
08/26/2008US7417275 Capacitor pair structure for increasing the match thereof
08/26/2008US7417272 Image sensor with improved dynamic range and method of formation
08/26/2008US7417270 Distributed high voltage JFET
08/26/2008US7417264 Top-emitting nitride-based light emitting device and method of manufacturing the same
08/26/2008US7417256 Display device and manufacturing method thereof
08/26/2008US7417255 Methods of forming a high conductivity diamond film and structures formed thereby
08/26/2008US7417254 Switching device for a pixel electrode and methods for fabricating the same
08/26/2008US7417253 Semiconductor device and manufacturing method therefor
08/26/2008US7417252 Flat panel display
08/26/2008US7417251 Active matrix organic EL display device and manufacturing method thereof
08/26/2008US7417250 Strained-silicon device with different silicon thicknesses
08/26/2008US7417248 Transistor with shallow germanium implantation region in channel
08/26/2008US7417246 Organic thin film transistor enhanced in charge carrier mobility by virtue of surface relief structure
08/26/2008US7417244 Surface inspection apparatus and method thereof
08/26/2008US7417241 Ion implantation method and method for manufacturing semiconductor device
08/26/2008US7417216 Fabrication of low leakage-current backside illuminated photodiodes
08/26/2008US7417104 Porous film-forming composition, patterning process, and porous sacrificial film
08/26/2008US7417018 Method of cleaning a solid surface by removing organic and/or mineral soils using a microemulsion
08/26/2008US7417016 Composition for the removing of sidewall residues
08/26/2008US7416998 Air-curtain forming apparatus for wafer hermetic container in semiconductor-fabrication equipment of minienvironment system
08/26/2008US7416997 Method of fabricating semiconductor device including removing impurities from silicon nitride layer
08/26/2008US7416996 Method of making circuitized substrate
08/26/2008US7416995 Method for fabricating controlled stress silicon nitride films
08/26/2008US7416994 Atomic layer deposition systems and methods including metal beta-diketiminate compounds
08/26/2008US7416993 Patterned nanowire articles on a substrate and methods of making the same
08/26/2008US7416992 Method of patterning a low-k dielectric using a hard mask
08/26/2008US7416991 High resolution patterning of surface energy utilizing high resolution monomolecular resist for fabrication of patterned media masters
08/26/2008US7416990 Method for patterning low dielectric layer of semiconductor device
08/26/2008US7416989 Adsorption based material removal process
08/26/2008US7416988 Semiconductor device and fabrication process thereof
08/26/2008US7416987 Semiconductor device and method of fabricating the same
08/26/2008US7416986 Test structure and method for detecting via contact shorting in shallow trench isolation regions
08/26/2008US7416985 Semiconductor device having a multilayer interconnection structure and fabrication method thereof
08/26/2008US7416984 Method of producing a MEMS device
08/26/2008US7416982 Semiconductor devices and methods for manufacturing the same
08/26/2008US7416981 Method of forming metal layer used in the fabrication of semiconductor device
08/26/2008US7416980 Forming a barrier layer in interconnect joints and structures formed thereby
08/26/2008US7416979 Deposition methods for barrier and tungsten materials
08/26/2008US7416978 Film forming method, film forming system and recording medium
08/26/2008US7416977 Method for manufacturing display device, liquid crystal television, and EL television
08/26/2008US7416976 Method of forming contacts using auxiliary structures
08/26/2008US7416975 Method of forming contact layers on substrates
08/26/2008US7416974 Method of manufacturing semiconductor device, and semiconductor device
08/26/2008US7416973 Method of increasing the etch selectivity in a contact structure of semiconductor devices
08/26/2008US7416972 Method of making same low moisture absorptive circuitized substrave with reduced thermal expansion
08/26/2008US7416971 Top layers of metal for integrated circuits
08/26/2008US7416970 Method for manufacturing semiconductor device
08/26/2008US7416969 Void free solder arrangement for screen printing semiconductor wafers
08/26/2008US7416968 Methods of forming field effect transistors having metal silicide gate electrodes
08/26/2008US7416967 Semiconductor device, and method for manufacturing the same
08/26/2008US7416965 Method for producing a strained layer on a substrate and corresponding layer structure
08/26/2008US7416964 Semiconductor wafer, semiconductor chip and dicing method of a semiconductor wafer
08/26/2008US7416963 Manufacturing method of semiconductor device
08/26/2008US7416962 Method for processing a semiconductor wafer including back side grinding
08/26/2008US7416961 Method for structuring a flat substrate consisting of a glass-type material
08/26/2008US7416960 Method for manufacturing SOI substrate
08/26/2008US7416959 Silicon-on-insulator semiconductor wafer
08/26/2008US7416958 Epitaxial semiconductor layer and method
08/26/2008US7416957 Method for forming a strained Si-channel in a MOSFET structure
08/26/2008US7416956 Self-aligned trench filling for narrow gap isolation regions
08/26/2008US7416955 Method of manufacturing a semiconductor device
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