Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2009
01/20/2009US7479673 Semiconductor integrated circuits with stacked node contact structures
01/20/2009US7479669 Current aperture transistors and methods of fabricating same
01/20/2009US7479668 Source/drain extension implant process for use with short time anneals
01/20/2009US7479667 Semiconductor device with modified mobility and thin film transistor having the same
01/20/2009US7479662 Coated LED with improved efficiency
01/20/2009US7479658 Epitaxial wafers, method for manufacturing of epitaxial wafers, method of suppressing bowing of these epitaxial wafers and semiconductor multilayer structures using these epitaxial wafers
01/20/2009US7479657 Semiconductor device including active matrix circuit
01/20/2009US7479656 Compound semiconductor formed from a heated portion of a layered structure including rare earth transition metal
01/20/2009US7479655 Semiconductor device
01/20/2009US7479650 Method of manufacture of programmable conductor memory
01/20/2009US7479644 Ion beam diagnostics
01/20/2009US7479643 Ion implantation ion source, system and method
01/20/2009US7479619 Thermal processing unit
01/20/2009US7479509 hybrid of hydrolyzed, dehydrolyzed and polymerized organosilicate compounds such as trimethoxymethylsilane,diethoxymethylsilane, trimethoxymethylsilane etc. and a ring opening polymerization containing polylactone, polylactam, polyethers end capped by e.g isocyanatopropyl/triethoxysilane, core of polyol
01/20/2009US7479474 post-etch resist residue removal using H2SiF6 or HBF4; N-methyl-2-pyrroldione an organic solvent; an amine e.g. ethanolamine, nitrilotris(methylene phosphonic acid) a corrosion inhibitor and water; pH less than 7; environmental friendly
01/20/2009US7479466 Method of heating semiconductor wafer to improve wafer flatness
01/20/2009US7479465 Transfer of stress to a layer
01/20/2009US7479464 Low temperature aerosol deposition of a plasma resistive layer
01/20/2009US7479463 Method for heating a chemically amplified resist layer carried on a rotating substrate
01/20/2009US7479462 Thin films and methods for the preparation thereof
01/20/2009US7479461 Method of etching silicon anisotropically
01/20/2009US7479460 Silicon surface preparation
01/20/2009US7479459 Semiconductor device manufacturing method and semiconductor device manufacturing apparatus
01/20/2009US7479458 Methods and apparatus for the optimization of highly selective process gases
01/20/2009US7479457 Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof
01/20/2009US7479456 Gasless high voltage high contact force wafer contact-cooling electrostatic chuck
01/20/2009US7479455 Method for manufacturing semiconductor wafer
01/20/2009US7479454 Method and processing system for monitoring status of system components
01/20/2009US7479453 Method of manufacturing semiconductor device
01/20/2009US7479452 Method of forming contact plugs
01/20/2009US7479451 Display device manufacturing method preventing diffusion of an aluminum element into a polysilicon layer in a heating step
01/20/2009US7479450 Post passivation interconnection schemes on top of the IC chips
01/20/2009US7479449 Underfill and mold compounds including siloxane-based aromatic diamines
01/20/2009US7479448 Method of manufacturing a light emitting device with a doped active layer
01/20/2009US7479447 Method of forming a crack stop void in a low-k dielectric layer between adjacent fuses
01/20/2009US7479446 Semiconductor device and method of manufacturing same
01/20/2009US7479445 Methods of forming field effect transistors having t-shaped gate electrodes using carbon-based etching masks
01/20/2009US7479444 Method for forming Schottky diodes and ohmic contacts in the same integrated circuit
01/20/2009US7479443 Germanium deposition
01/20/2009US7479442 Method of manufacturing single crystal Si film
01/20/2009US7479441 Method and apparatus for flag-less water bonding tool
01/20/2009US7479440 Method of forming an isolation structure that includes forming a silicon layer at a base of the recess
01/20/2009US7479439 Semiconductor-insulator-silicide capacitor
01/20/2009US7479438 Method to improve performance of a bipolar device using an amorphizing implant
01/20/2009US7479437 Method to reduce contact resistance on thin silicon-on-insulator device
01/20/2009US7479436 Feed forward silicide control scheme based on spacer height controlling preclean time
01/20/2009US7479435 Method of forming a circuit having subsurface conductors
01/20/2009US7479434 Semiconductor device and method of manufacturing the same
01/20/2009US7479433 Method for manufacturing semiconductor device
01/20/2009US7479431 Strained NMOS transistor featuring deep carbon doped regions and raised donor doped source and drain
01/20/2009US7479430 Non-volatile semiconductor memory device
01/20/2009US7479429 Split game memory cell method
01/20/2009US7479428 NROM flash memory with a high-permittivity gate dielectric
01/20/2009US7479427 Semiconductor device and method of fabrication
01/20/2009US7479426 Method of manufacturing non-volatile memory cell
01/20/2009US7479425 Method for forming high-K charge storage device
01/20/2009US7479424 Method for fabricating an integrated circuit comprising a three-dimensional capacitor
01/20/2009US7479423 Semiconductor device and manufacturing method of semiconductor device
01/20/2009US7479422 Semiconductor device with stressors and method therefor
01/20/2009US7479421 Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
01/20/2009US7479420 Laser optical apparatus
01/20/2009US7479419 Array substrate for liquid crystal display device and fabricating method of the same
01/20/2009US7479418 Methods of applying substrate bias to SOI CMOS circuits
01/20/2009US7479417 Method for manufacturing contact structure of pixel electrode of liquid crystal display device
01/20/2009US7479416 Thin film transistor array panel and manufacturing method thereof
01/20/2009US7479415 Fabrication method of polycrystalline silicon liquid crystal display device
01/20/2009US7479414 Electrostatic discharge protection device for digital circuits and for applications with input/output bipolar voltage much higher than the core circuit power supply
01/20/2009US7479413 Method for fabricating semiconductor package with circuit side polymer layer
01/20/2009US7479412 Adhesive film for semiconductor, lead frame and semiconductor device using the same, and method of producing semiconductor device
01/20/2009US7479411 Apparatus and method for forming solder seals for semiconductor flip chip packages
01/20/2009US7479409 Integrated circuit package with elevated edge leadframe
01/20/2009US7479408 Stack package made of chip scale packages
01/20/2009US7479407 Digital and RF system and method therefor
01/20/2009US7479406 Bottom heatslug EPBGA for high thermal performance
01/20/2009US7479405 PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same
01/20/2009US7479404 Photonic crystal biosensor structure and fabrication method
01/20/2009US7479403 Pinned photodiode integrated with trench isolation and fabrication method
01/20/2009US7479402 Comb structure fabrication methods and systems
01/20/2009US7479401 Front side illuminated photodiode with backside bump
01/20/2009US7479400 Method of manufacturing semiconductor laser element by formation and removal of ridge part protrusion
01/20/2009US7479399 System and method for providing automated sample preparation for plan view transmission electron microscopy
01/20/2009US7479398 Methods and apparatus for packaging integrated circuit devices
01/20/2009US7479397 Optoelectronics processing module and method for manufacturing thereof
01/20/2009US7479396 Structure, system and method for dimensionally unstable layer dimension measurement
01/20/2009US7479395 Method of monitoring a production process using a linear combination of measured variables with selected weights
01/20/2009US7479394 MgO/NiFe MTJ for high performance MRAM application
01/20/2009US7479366 Mixture of photomasks; controlling incline of pattern; lithography; phase shifting; removal of mask by etching
01/20/2009US7479365 Semiconductor device manufacturing method
01/20/2009US7479364 lithographic photoresist; deep UV, x-ray, electon beam: alpha-cyano- or an alpha-trifluoro methacrylate monomer and a vinyl ether monomer; 157 nm.
01/20/2009US7479361 Chemically amplified resist composition, process for manufacturing semiconductor device and patterning process
01/20/2009US7479318 Fibrillar microstructure and processes for the production thereof
01/20/2009US7479317 Adhesive sheet roll for wafer processing
01/20/2009US7479305 Immersion plating of silver
01/20/2009US7479233 Mask blank for charged particle beam exposure, method of forming mask blank and mask for charged particle beam exposure
01/20/2009US7479232 Method for producing a semiconductor component and a semiconductor component produced according to the method
01/20/2009US7479213 Plating method and plating apparatus
01/20/2009US7479205 Substrate processing apparatus
01/20/2009US7479204 Method of manufacturing semiconductor substrate and method of evaluating quality of semiconductor substrate
01/20/2009US7479187 Method for manufacturing silicon epitaxial wafer
01/20/2009US7478609 Plasma process apparatus and its processor