Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2009
01/27/2009US7482250 Method for cutting printed circuit board
01/27/2009US7482249 Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer
01/27/2009US7482248 Manufacturing method of semiconductor device
01/27/2009US7482247 Conformal nanolaminate dielectric deposition and etch bag gap fill process
01/27/2009US7482246 Trench isolation structure in a semiconductor device and method for fabricating the same
01/27/2009US7482245 Stress profile modulation in STI gap fill
01/27/2009US7482244 Method of preventing a peeling issue of a high stressed thin film
01/27/2009US7482243 Ultra-thin Si channel MOSFET using a self-aligned oxygen implant and damascene technique
01/27/2009US7482242 Capacitor, method of forming the same, semiconductor device having the capacitor and method of manufacturing the same
01/27/2009US7482241 Method for fabricating metal-insulator-metal capacitor of semiconductor device with reduced patterning steps
01/27/2009US7482240 Method for manufacturing semiconductor device
01/27/2009US7482239 Methods of forming integrated circuitry
01/27/2009US7482238 Method for manufacturing semiconductor device
01/27/2009US7482237 Semiconductor device and method of producing the same, and power conversion apparatus incorporating this semiconductor device
01/27/2009US7482236 Structure and method for a sidewall SONOS memory device
01/27/2009US7482235 Semiconductor device and method of manufacturing the same
01/27/2009US7482234 Method of fabricating a metal oxynitride thin film that includes a first annealing of a metal oxide film in a nitrogen-containing atmosphere to form a metal oxynitride film and a second annealing of the metal oxynitride film in an oxidizing atmosphere
01/27/2009US7482233 Embedded non-volatile memory cell with charge-trapping sidewall spacers
01/27/2009US7482231 Manufacturing of memory array and periphery
01/27/2009US7482230 Recess channel transistor for preventing deterioration of device characteristics due to misalignment of gate layers and method of forming the same
01/27/2009US7482229 DRAM cells with vertical transistors
01/27/2009US7482228 Method of forming a MOS transistor with a litho-less gate
01/27/2009US7482227 Method for manufacturing a flash memory
01/27/2009US7482226 Semiconductor memory device
01/27/2009US7482225 Method of fabricating floating gate of flash memory device
01/27/2009US7482224 Methods of fabricating semiconductor integrated circuit devices including SRAM cells and flash memory cells
01/27/2009US7482223 Multi-thickness dielectric for semiconductor memory
01/27/2009US7482222 Semiconductor device and method of manufacturing the same
01/27/2009US7482221 Memory device and method of manufacturing a memory device
01/27/2009US7482220 Semiconductor device having deep trench charge compensation regions and method
01/27/2009US7482219 Technique for creating different mechanical strain by a contact etch stop layer stack with an intermediate etch stop layer
01/27/2009US7482218 Low-capacitance input/output and electrostatic discharge circuit for protecting an integrated circuit from electrostatic discharge
01/27/2009US7482217 Forming metal-semiconductor films having different thicknesses within different regions of an electronic device
01/27/2009US7482216 Substrate engineering for optimum CMOS device performance
01/27/2009US7482215 Self-aligned dual segment liner and method of manufacturing the same
01/27/2009US7482214 Transistor design and layout for performance improvement with strain
01/27/2009US7482212 Semiconductor device and manufacturing method thereof
01/27/2009US7482211 Junction leakage reduction in SiGe process by implantation
01/27/2009US7482210 Method of fabricating semiconductor device having junction isolation insulating layer
01/27/2009US7482209 Hybrid orientation substrate and method for fabrication of thereof
01/27/2009US7482208 Thin film transistor array panel and method of manufacturing the same
01/27/2009US7482207 Electronic devices
01/27/2009US7482206 Semiconductor devices having nano-line channels and methods of fabricating the same
01/27/2009US7482205 Process for resurf diffusion for high voltage MOSFET
01/27/2009US7482204 Chip packaging process
01/27/2009US7482203 Stacked integrated circuit package-in-package system
01/27/2009US7482202 Semiconductor device including a plurality of circuit element chips and a manufacturing method thereof
01/27/2009US7482201 Nanoparticle filled underfill
01/27/2009US7482200 Process for fabricating chip package structure
01/27/2009US7482199 Self alignment features for an electronic assembly
01/27/2009US7482198 Method for producing through-contacts and a semiconductor component with through-contacts
01/27/2009US7482197 Method and apparatus for deploying a liquid metal thermal interface for chip cooling
01/27/2009US7482196 Method of manufacturing a semiconductor device having MEMS
01/27/2009US7482195 High mobility high efficiency organic films based on pure organic materials
01/27/2009US7482194 Electronic component having micro-electrical mechanical system
01/27/2009US7482193 Injection-molded package for MEMS inertial sensor
01/27/2009US7482192 Method of making dimple structure for prevention of MEMS device stiction
01/27/2009US7482191 Highly doped III-nitride semiconductors
01/27/2009US7482190 Micromechanical strained semiconductor by wafer bonding
01/27/2009US7482188 Rubbing system for alignment layer of LCD and method thereof
01/27/2009US7482187 Display and method of manufacturing the same
01/27/2009US7482186 Method for fabricating active matrix organic light emitting diode display device and structure of such device
01/27/2009US7482185 Vertical pixel structures for emi-flective display and methods for making the same
01/27/2009US7482184 Manufacture of a layer of optical interconnection on an electronic circuit
01/27/2009US7482183 Light emitting diode with degenerate coupling structure
01/27/2009US7482182 Semiconductor device and method of manufacturing same
01/27/2009US7482181 Method for fabricating a light-emitting device based on a gallium nitride-based compound semiconductor, and light-emitting device based on a gallium nitride-based compound semiconductor
01/27/2009US7482180 Method for determining the impact of layer thicknesses on laminate warpage
01/27/2009US7482179 Method of fabricating a thin film transistor using dual or multiple gates
01/27/2009US7482178 Chamber stability monitoring using an integrated metrology tool
01/27/2009US7482177 Method for manufacturing optical device, and optical device wafer
01/27/2009US7482176 Etch mask and method of forming a magnetic random access memory structure
01/27/2009US7482175 Method of manufacturing substrate having periodically poled regions
01/27/2009US7482111 forming a barrier metal layer on a wafer; producing a plated shaped article, highly precisely forming a high bump having a height of 20 to 200 mu m on a chip base; amide or ester monomers increases affinity of a resist for a plating solution; wettability; photolithography
01/27/2009US7482102 Monitoring pattern configured to obtain information required for adjusting optical system; asymmetrical diffraction grating generates positive first order diffracted light and negative first order diffracted light; probing phase shifters
01/27/2009US7482068 n-type or a p-type conductivity; drift zone of high voltage power devices; low cost; swiches
01/27/2009US7481950 Polishing composition and polishing method using the same
01/27/2009US7481949 Polishing composition and rinsing composition
01/27/2009US7481945 Polishing progress monitoring method and device thereof, polishing device, semiconductor device production method, and semiconductor device
01/27/2009US7481944 Etch amount detection method, etching method, and etching system
01/27/2009US7481904 Plasma device
01/27/2009US7481903 Processing device and method of maintaining the device, mechanism and method for assembling processing device parts, and lock mechanism and method for locking the lock mechanism
01/27/2009US7481902 Substrate processing apparatus and method, high speed rotary valve and cleaning method
01/27/2009US7481888 Heat treatment jig and heat treatment method for silicon wafer
01/27/2009US7481887 Apparatus for controlling gas pulsing in processes for depositing materials onto micro-device workpieces
01/27/2009US7481882 Method for forming a thin film
01/27/2009US7481881 Method of manufacturing GaN crystal substrate
01/27/2009US7481880 Mask and method for crystallizing amorphous silicon
01/27/2009US7481879 Diamond single crystal substrate manufacturing method and diamond single crystal substrate
01/27/2009US7481695 Polishing apparatus and methods having high processing workload for controlling polishing pressure applied by polishing head
01/27/2009US7481352 Method for ablating points of contact (debumping)
01/27/2009US7481351 Wire bonding apparatus and method for clamping a wire
01/27/2009US7481240 Partial pressure control system, flow rate control system and shower plate used for partial pressure control system
01/27/2009US7481230 Plasma processing method and apparatus
01/27/2009US7480990 Method of making conductor contacts having enhanced reliability
01/27/2009US7480988 Method and apparatus for providing hermetic electrical feedthrough
01/27/2009CA2368127C Accelerometer transducer used for seismic recording
01/22/2009WO2009012469A2 Structures of and methods for forming vertically aligned si wire arrays
01/22/2009WO2009012396A2 Substrate processing apparatus with motors integral to chamber walls
01/22/2009WO2009012346A1 Methods for fabricating p-type cadmium selenide