Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2009
11/25/2009CN101587869A Reversible leadless package and methods of making and using same
11/25/2009CN101587868A Qfn semiconductor package and fabrication method thereof
11/25/2009CN101587866A Chip encapsulating structure and encapsulating method
11/25/2009CN101587865A Semiconductor device and a method of manufacturing the same
11/25/2009CN101587864A Nrom device and manufacturing method thereof
11/25/2009CN101587863A Polysilicon grid etching method for flash memory based on SONOS and device
11/25/2009CN101587862A Method for forming insulating structure and semiconductor structure
11/25/2009CN101587861A Method for producing thin-film transistor array substrate
11/25/2009CN101587860A Method for fabricating semiconductor device
11/25/2009CN101587859A Method for forming semiconductor interconnected structure
11/25/2009CN101587858A Semiconductor device interconnected structure and manufacturing method thereof
11/25/2009CN101587857A Cover layer of semiconductor device interconnected structure and manufacturing method thereof
11/25/2009CN101587856A Method for solving enclosure and facet problems in etching technology
11/25/2009CN101587855A Method for manufacturing via hole and metal valley
11/25/2009CN101587854A Method for manufacturing via hole and metal valley
11/25/2009CN101587853A Metal valley manufacture method
11/25/2009CN101587852A Method for optimizing metal valley manufacture
11/25/2009CN101587851A Device for holding plate-like article
11/25/2009CN101587850A Bearing structure and testing device
11/25/2009CN101587849A Semiconductor device package having features formed by stamping
11/25/2009CN101587848A Method for encapsulating optoelectronic components
11/25/2009CN101587847A Perpendicular interconnection multi-chip assembly encapsulation method by PCB substrate
11/25/2009CN101587846A Device and method for bonding wafer and method for leveling the bonded wafer
11/25/2009CN101587845A Packaging method and packaging structure of electronic volume label and personnel management-control method in dust free room
11/25/2009CN101587844A Packaging structure and packaging method
11/25/2009CN101587843A Preparation method of a circuit cardinal plate
11/25/2009CN101587842A Chip packaging support plate and manufacture method thereof
11/25/2009CN101587841A Method for forming weld pads in cold welding mode
11/25/2009CN101587840A Method of forming semiconductor thin film and semiconductor thin film inspection apparatus
11/25/2009CN101587839A Method for producing thin film transistors
11/25/2009CN101587838A Method for forming hole on dielectric layer
11/25/2009CN101587837A Forming method of groove
11/25/2009CN101587836A Dry etching method for removing silicon nitride film
11/25/2009CN101587835A Manufacturing method for shallow groove
11/25/2009CN101587834A Manufacturing method for grate structure
11/25/2009CN101587833A Method for removing residual photoresist
11/25/2009CN101587832A Capacitor and manufacturing method thereof
11/25/2009CN101587831A Semiconductor component structure and method for manufacturing semiconductor component
11/25/2009CN101587830A Large-area NW P-N junction array and manufacture method thereof
11/25/2009CN101587829A Surface mounting apparatus
11/25/2009CN101587828A Light irradiation device
11/25/2009CN101587827A Multiple-electrode plasma processing systems with confined process chambers and interior-bussed electrical connections with the electrodes
11/25/2009CN101587826A Crystal solidifying apparatus
11/25/2009CN101587825A Plasma processing apparatus and plasma processing method
11/25/2009CN101587824A Registration mark and manufacturing method thereof
11/25/2009CN101587823A Inflation equipment
11/25/2009CN101587822A Method for separating semiconductor and base plate thereof
11/25/2009CN101587821A Electrode plate
11/25/2009CN101587820A Plasma etching method and device for improving depth difference of grooves
11/25/2009CN101587681A Display device, method of laying out light emitting elements, and electronic device
11/25/2009CN101587304A Pattern transferring method
11/25/2009CN101587303A Lithographic apparatus and device manufacturing method
11/25/2009CN101587296A Surface plasma nano photolithography
11/25/2009CN101587291A Method of screen printing fine mask on silicon chip surface based on UV curing process
11/25/2009CN101587272A Liquid crystal display device and fabrication method thereof
11/25/2009CN101587268A 液晶显示装置 The liquid crystal display device
11/25/2009CN101587156A Method and apparatus for measuring electron density of plasma and plasma processing apparatus
11/25/2009CN101586985A Monolithic integrated non-refrigerated infrared/ultraviolet double-color detector and manufacture method thereof
11/25/2009CN101585164A Polishing apparatus
11/25/2009CN101585019A Semiconductor processing device and nozzle structure used in same
11/25/2009CN100563397C Heating device
11/25/2009CN100563034C An image sensor and method of forming active picture sensor unit structure
11/25/2009CN100563032C Semiconductor device and method for manufacturing semiconductor device
11/25/2009CN100563031C Single poly, multi-bit non-volatile memory device and methods for operating the same
11/25/2009CN100563030C Flash memory device with stacked dielectric structure including zirconium oxide and method for fabricating the same
11/25/2009CN100563028C Five channel fin transistor and method for fabricating the same
11/25/2009CN100563026C Efficient transistor structure
11/25/2009CN100563025C Method of forming bottom oxide for nitride flash memory
11/25/2009CN100563024C Package having exposed integrated circuit device
11/25/2009CN100563023C Organic electroluminescent display device and method of fabricating the same
11/25/2009CN100563022C Organic thin film transistor array substrate and fabricating method thereof
11/25/2009CN100563021C Organic thin film transistor array substrate and fabricating method thereof
11/25/2009CN100563020C Method and structure of a multi-level cell resistance random access memory with metal oxides
11/25/2009CN100563019C CMOS image sensor and its manufacture method
11/25/2009CN100563018C Backside illuminated sensor and formation method thereof
11/25/2009CN100563017C A touching microlens structure for a pixel sensor and method of fabrication
11/25/2009CN100563016C Image sensor and method of fabricating the same
11/25/2009CN100563014C Display substrate, display device and method of manufacturing the same
11/25/2009CN100563013C Semiconductor device and method of manufacturing the same
11/25/2009CN100563012C An apparatus and associated method for making a virtual ground array structure that uses inversion bit lines
11/25/2009CN100563008C Semiconducter device and mfg. method thereof
11/25/2009CN100563006C 半导体集成电路器件 The semiconductor integrated circuit device
11/25/2009CN100563005C Manufacturing method for semiconductor device, semiconductor device and semiconductor chip
11/25/2009CN100563002C Structure and method for packing LED chip
11/25/2009CN100563001C Mounting body and method for manufacturing same
11/25/2009CN100563000C Semiconductor device and method for fabricating the same
11/25/2009CN100562999C Circuit module
11/25/2009CN100562998C Wire structure, method of forming wire, thin film transistor substrate, and method of manufacturing thin film transistor substrate
11/25/2009CN100562997C Interpolater provided between the semiconductor component and semiconductor packaging
11/25/2009CN100562995C Bottom substrate of package on package and manufacturing method thereof
11/25/2009CN100562990C Substrate for mounting microwave chip integrated circuit and microwave communication generator and transceiver
11/25/2009CN100562989C Liquid crystal display device and its manufacture method
11/25/2009CN100562988C Manufacturing method of semiconductor device on insulator
11/25/2009CN100562987C Memory unit array and its making method and semiconductor circuit device using the same
11/25/2009CN100562986C Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress
11/25/2009CN100562985C Method for making a self-converged void and bottom electrode for memoery cell
11/25/2009CN100562984C Semiconductor device, mosaic structure and method forming inter-connection
11/25/2009CN100562983C Electrostatic chuck
11/25/2009CN100562982C Recognition method and system
11/25/2009CN100562981C Semiconductor chip and method of manufacturing semiconductor chip and semiconductor device