Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2014
08/20/2014EP2766923A1 Overlay and semiconductor process control using a novel wafer geometry metric
08/20/2014EP2766922A1 Power semi-conductor chip with a metal moulded body for contacting thick wires or strips, and method for the production thereof
08/20/2014EP2766921A1 Non-contact magnetic drive assembly with mechanical stop elements
08/20/2014EP2766920A1 Spin-on carbon compositions for lithographic processing
08/20/2014EP2766698A1 Sensor unit and method for the end of line programming of a sensor unit
08/20/2014EP2766443A1 B-stageable silicone adhesives
08/19/2014USRE45084 Method of fabricating optical device using multiple sacrificial spacer layers
08/19/2014US8813014 Semiconductor device and method for making the same using semiconductor fin density design rules
08/19/2014US8811713 Photomask inspection method, semiconductor device inspection method, and pattern inspection apparatus
08/19/2014US8811122 LED light means with time piece
08/19/2014US8810992 Electrostatic chuck
08/19/2014US8810903 Imaging optical system
08/19/2014US8810798 Method and apparatus for real-time determination of spherical and non-spherical curvature of a surface
08/19/2014US8810771 Lithographic apparatus and device manufacturing method
08/19/2014US8810272 Method of testing a structure protected from overvoltages and the corresponding structure
08/19/2014US8810130 Light-emitting device and method of manufacturing the same
08/19/2014US8810043 Semiconductor device
08/19/2014US8810039 Semiconductor device having a pad and plurality of interconnects
08/19/2014US8810035 Semiconductor bonding structure body and manufacturing method of semiconductor bonding structure body
08/19/2014US8810034 Semiconductor device and manufacturing method thereof
08/19/2014US8810032 Semiconductor device and method for manufacturing of same
08/19/2014US8810029 Solder joint flip chip interconnection
08/19/2014US8810027 Bond ring for a first and second substrate
08/19/2014US8810024 Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units
08/19/2014US8810020 Semiconductor device with redistributed contacts
08/19/2014US8810015 Integrated circuit packaging system with high lead count and method of manufacture thereof
08/19/2014US8810010 Semiconductor device and method for fabricating the same
08/19/2014US8810009 Method of fabricating a planar semiconductor nanowire
08/19/2014US8810008 Semiconductor element-embedded substrate, and method of manufacturing the substrate
08/19/2014US8810001 Seal ring structure with capacitor
08/19/2014US8810000 Semiconductor device comprising capacitive element
08/19/2014US8809998 Semiconductor device including in wafer inductors, related method and design structure
08/19/2014US8809994 Deep isolation trench structure and deep trench capacitor on a semiconductor-on-insulator substrate
08/19/2014US8809991 Semiconductor devices including bipolar transistors, CMOS transistors and DMOS transistors, and methods of manufacturing the same
08/19/2014US8809990 Semiconductor device and method of manufacturing the same
08/19/2014US8809987 Normally-off III-nitride metal-2DEG tunnel junction field-effect transistors
08/19/2014US8809984 Substrate connection type module structure
08/19/2014US8809983 Semiconductor device, manufacturing method therefor, and electronic apparatus
08/19/2014US8809970 Semiconductor device and method for manufacturing the same
08/19/2014US8809965 Semiconductor device
08/19/2014US8809964 Method of adjusting the threshold voltage of a transistor by a buried trapping layer
08/19/2014US8809962 Transistor with reduced parasitic capacitance
08/19/2014US8809956 Vertically oriented semiconductor device and shielding structure thereof
08/19/2014US8809955 Semiconductor structure and method for manufacturing the same
08/19/2014US8809954 Partially depleted (PD) semiconductor-on-insulator (SOI) field effect transistor (FET) structure with a gate-to-body tunnel current region for threshold voltage (Vt) lowering and method of forming the structure
08/19/2014US8809952 Lateral transistor component and method for producing same
08/19/2014US8809948 Device structure and methods of making high density MOSFETs for load switch and DC-DC applications
08/19/2014US8809947 Integrated circuits and methods for fabricating integrated circuits with cladded non-planar transistor structures
08/19/2014US8809940 Fin held effect transistor
08/19/2014US8809934 Semiconductor device and a manufacturing method thereof
08/19/2014US8809933 Bit line structure, semiconductor device and method of forming the same
08/19/2014US8809932 Semiconductor memory device, method of fabricating the same, and devices employing the semiconductor memory device
08/19/2014US8809929 Microelectronic memory devices having flat stopper layers
08/19/2014US8809926 Semiconductor memory devices including vertical transistor structures
08/19/2014US8809924 Imaging device, method for fabricating imaging device, and imaging apparatus
08/19/2014US8809919 Semiconductor device with inverted trapezoidal cross sectional profile in surface areas of substrate
08/19/2014US8809908 Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device
08/19/2014US8809900 Light emitting diode device and producing method thereof
08/19/2014US8809898 Method of fabricating vertical structure LEDs
08/19/2014US8809867 Dislocation reduction in non-polar III-nitride thin films
08/19/2014US8809866 Light emitting device and electronic apparatus
08/19/2014US8809859 Devices and methods for embedding semiconductors in printed circuit boards
08/19/2014US8809837 Vertical stacking of graphene in a field-effect transistor
08/19/2014US8809828 Small footprint phase change memory cell
08/19/2014US8809734 Methods and systems for thermal-based laser processing a multi-material device
08/19/2014US8809694 Circuit module
08/19/2014US8809247 Cleaning composition and method for cleaning substrate for electronic device
08/19/2014US8809208 Nano-tube thermal interface structure
08/19/2014US8809207 Pattern-forming method and method for manufacturing semiconductor device
08/19/2014US8809206 Patterned dummy wafers loading in batch type CVD
08/19/2014US8809205 Sequential atomic layer deposition of electrodes and resistive switching components
08/19/2014US8809204 Method of manufacturing semiconductor device and substrate processing apparatus
08/19/2014US8809203 Method for manufacturing semiconductor device using a microwave plasma CVD apparatus
08/19/2014US8809202 Methods of manufacturing semiconductor devices including use of a protective material
08/19/2014US8809201 Method of forming metal oxide film and metal oxide film
08/19/2014US8809200 Method of manufacturing a structure based on anisotropic etching, and silicon substrate with etching mask
08/19/2014US8809199 Method of etching features in silicon nitride films
08/19/2014US8809198 Nano-crystal etch process
08/19/2014US8809197 Plasma etching apparatus and control method
08/19/2014US8809196 Method of etching a thin film using pressure modulation
08/19/2014US8809195 Etching high-k materials
08/19/2014US8809194 Formation of SiOCl-containing layer on spacer sidewalls to prevent CD loss during spacer etch
08/19/2014US8809193 Method for the formation of Co film and method for the formation of Cu interconnection film
08/19/2014US8809192 Method for deposition of at least one electrically conducting film on a substrate
08/19/2014US8809191 Semiconductor device and method of forming UBM structure on back surface of TSV semiconductor wafer
08/19/2014US8809190 Multi-function and shielded 3D interconnects
08/19/2014US8809189 Method of forming through-silicon via using laser ablation
08/19/2014US8809188 Method for fabricating through substrate vias
08/19/2014US8809187 Body contacts for FET in SOI SRAM array
08/19/2014US8809186 Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same
08/19/2014US8809185 Dry etching method for metallization pattern profiling
08/19/2014US8809184 Methods of forming contacts for semiconductor devices using a local interconnect processing scheme
08/19/2014US8809183 Interconnect structure with a planar interface between a selective conductive cap and a dielectric cap layer
08/19/2014US8809182 Pad cushion structure and method of fabrication for Pb-free C4 integrated circuit chip joining
08/19/2014US8809181 Multi-solder techniques and configurations for integrated circuit package assembly
08/19/2014US8809180 Producing SiC packs on a wafer plane
08/19/2014US8809179 Method for reducing topography of non-volatile memory and resulting memory cells
08/19/2014US8809178 Methods of forming bulk FinFET devices with replacement gates so as to reduce punch through leakage currents
08/19/2014US8809177 Semiconductor device and method for manufacturing the same
08/19/2014US8809176 Replacement gate with reduced gate leakage current