Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
12/2011
12/20/2011US8081536 Circuit for memory module
12/20/2011US8081535 Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module
12/20/2011US8081534 Automatic scrambling of input/output data according to row addresses in a semiconductor memory device
12/20/2011US8081511 Flash memory device with redundant columns
12/20/2011US8081394 Information recording apparatus and method, information reproducing method and fade-in memory, with summary information corresponding to plurality of information recording elements
12/15/2011WO2011156525A2 Ferroelectric memories based on arrays of autonomous memory bits
12/15/2011WO2011156069A2 Memory arrays
12/15/2011US20110307682 Block management for mass storage
12/14/2011EP2395511A2 Semiconductor integrated circuit having low power consumption with self-refresh
12/14/2011CN1701386B 用于读取无源矩阵可寻址器件的方法和器件 The method used to read passive matrix addressable devices and devices
12/14/2011CN102282619A 用以在ddr dram写入期间三态控制未使用数据字节的方法、系统及设备 For the tri-state control during ddr dram unused data byte write method, system and equipment
12/14/2011CN102280135A 半导体器件以及集成半导体器件 Semiconductor devices and integrated semiconductor device
12/14/2011CN101635165B 用低压mos晶体管耐高压的解码电路和实现方法 Mos transistors with low-voltage high voltage decoding circuitry and implementation
12/14/2011CN101147396B 使用循环缓存存储器以曲折扫描顺序处理数据阵列的方法和设备 Using a circular buffer memory to the data array zigzag scan order processing method and apparatus
12/13/2011US8078821 Semiconductor memory asynchronous pipeline
12/13/2011US8077538 Address decoder and/or access line driver and method for memory devices
12/13/2011US8077493 Semiconductor memory device
12/13/2011CA2528035C File management method
12/08/2011WO2011153436A1 Vertically stackable dies having chip identifier structures
12/08/2011WO2011153096A2 Methods and apparatuses for delay-locked loops and phase-locked loops
12/08/2011US20110299355 Word line driver for memory
12/08/2011US20110299354 Memory array circuit incorporating multiple array block selection and related method
12/08/2011US20110298511 Strobe signal management to clock data into a system
12/07/2011CN102272843A 使用双技术晶体管的低泄漏高性能静态随机存取存储器单元 Dual low-leakage high-performance technology transistor static random access memory cell
12/07/2011CN101587741B 字线追踪系统 Wordline tracking system
12/06/2011US8072838 Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay
12/06/2011US8072837 Circuit providing load isolation and memory domain translation for memory module
12/06/2011US8072836 Systems, methods and devices for arbitrating die stack position in a multi-die stack device
12/06/2011US8072835 Row address decoder and semiconductor memory device having the same
12/06/2011US8072834 Line driver circuit and method with standby mode of operation
12/06/2011US8072833 Semiconductor memory device
12/06/2011US8072818 Dual-threshold-voltage two-port sub-threshold SRAM cell apparatus
12/06/2011US8072809 Nonvolatile semiconductor memory
12/01/2011US20110292754 Memory word-line driver having reduced power consumption
12/01/2011US20110292743 Sequential access memory elements
12/01/2011US20110292708 3d semiconductor device
12/01/2011DE19929725B4 Integrierte Schaltung mit einer Decodereinheit An integrated circuit comprising a decoder unit
11/2011
11/30/2011CN102265349A 用于降低电路复杂度的非二进制解码器架构以及控制信号逻辑 Used to reduce the circuit complexity of a non-binary decoder architecture and a control signal logic
11/30/2011CN101159804B 图像处理设备和方法 The image processing apparatus and method
11/29/2011USRE42976 Semiconductor memory device with reduced data access time
11/29/2011US8069204 Providing and receiving content over a wireless communication system
11/29/2011US8068383 Semiconductor integrated circuit having address control circuit
11/29/2011US8068382 Semiconductor memory with multiple wordline selection
11/29/2011US8068381 Cache memory
11/29/2011US8068380 Block repair scheme
11/29/2011US8068379 Dynamic RAM
11/29/2011US8068358 Semiconductor memory device
11/24/2011US20110286295 Methods of Arranging L-Shaped Cell Blocks In Semiconductor Devices
11/24/2011US20110286288 Dynamic adjustment of reference voltage in a computer memory system
11/24/2011US20110286286 Semiconductor integrated circuit for generating clock signals
11/24/2011US20110286285 Semiconductor integrated circuit for generating clock signals
11/24/2011US20110286262 Semiconductor memory device
11/23/2011CN102257571A Mesochronous signaling system with multiple power modes
11/23/2011CN102257569A Clock-forwarding low-power signaling system
11/23/2011CN102257568A Semiconductor device with main memory unit and auxiliary memory unit requiring preset operation
11/22/2011US8065553 Phase interpolator for a timing signal generating circuit
11/22/2011US8064284 Method for accessing vertically stacked embedded non-flash re-writable non-volatile memory
11/22/2011US8064283 Semiconductor memory apparatus and a method for reading data stored therein
11/22/2011US8064282 Method of accessing synchronous dynamic random access memory, memory control circuit, and memory system including the same
11/22/2011US8064279 Structure and method for screening SRAMS
11/22/2011US8064272 Semiconductor memory device
11/22/2011US8064237 Identifying and accessing individual memory devices in a memory channel
11/17/2011US20110280097 Wordline driver for memory
11/17/2011US20110280092 Multi-Bank Read/Write To Reduce Test-Time In Memories
11/17/2011DE102011075811A1 Wortleitungstreiber flir Speicher Word line driver flir memory
11/15/2011US8059484 Semiconductor storage device and high-speed address-latching method
11/15/2011US8059483 Address receiving circuit for a semiconductor apparatus
11/15/2011US8059476 Control component for controlling a delay interval within a memory component
11/15/2011US8059461 Flash memory device
11/15/2011US8059440 Content-addressable memory
11/10/2011WO2011140033A2 Techniques for refreshing a semiconductor memory device
11/10/2011US20110273943 System and Method to Read a Memory Cell with a Complementary Metal-Oxide-Semiconductor (CMOS) Read Transistor
11/10/2011US20110273938 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
11/10/2011US20110273937 Semiconductor memory device and method for operating the same
11/09/2011CN102239524A Logical unit operation
11/09/2011CN102239523A Switched interface stacked-die memory architecture
11/09/2011CN102237126A Tone generation apparatus
11/09/2011CN101271729B Content data storage device and its control method
11/08/2011US8055398 Method of reducing current consumption of electric hydraulic power steering system for vehicle
11/08/2011US8054710 Integrated circuit device and electronic instrument
11/08/2011US8054663 Process variation compensated multi-chip memory package
11/03/2011WO2011137257A1 Non-volatile memory and method with even/odd combined interleaved block decoding with adapted word line activation circuitry
11/03/2011US20110267917 Row mask addressing
11/03/2011US20110267915 Anti-fuse, anti-fuse circuit including the same, and method of fabricating the anti-fuse
11/03/2011US20110267907 Semiconductor memory device, semiconductor system including the semiconductor memory device, and method for operating the semiconductor memory device
11/03/2011US20110267874 Invalid Write Prevention for STT-MRAM Array
11/02/2011EP2382637A1 Enhanced addressability for serial non-volatile memory
11/02/2011EP2382632A1 Low leakage high performance static random access memory cell using dual-technology transistors
11/01/2011US8051344 Semiconductor memory testing device and method of testing semiconductor using the same
11/01/2011US8050137 Semiconductor integrated circuit capable of controlling read command
11/01/2011US8050136 Semiconductor memory device for guaranteeing reliability of data transmission and semiconductor system including the same
11/01/2011US8050135 Semiconductor memory device
11/01/2011US8050134 Multi-column addressing mode memory system including an integrated circuit memory device
11/01/2011US8050133 Word line driver, method for driving the word line driver, and semiconductor memory device having the word line driver
11/01/2011US8050132 Semiconductor device
11/01/2011US8050131 System and memory for sequential multi-plane page memory operations
11/01/2011US8050130 Semiconductor memory device and internal data transmission method thereof
11/01/2011US8050121 Semiconductor memory, system, operating method of semiconductor memory, and manufacturing method of semiconductor memory
11/01/2011US8050118 Semiconductor memory device
11/01/2011US8050075 Memory
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