Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
05/2013
05/01/2013EP2587485A1 A dual-port memory and a method thereof
05/01/2013EP2586031A2 Method and apparatus for training a memory signal via an error signal of a memory
05/01/2013EP2586029A2 Memory write operation methods and circuits
05/01/2013CN103077738A Interlocking for reading out column selection signal and data bus pre-charge control signal
05/01/2013CN103077737A Word line voltage biasing circuit
05/01/2013CN102047340B Apparatus and method for multi-phase clock generation
04/2013
04/30/2013US8432769 Semiconductor memory device and memory system having the same
04/30/2013US8432768 Mesochronous signaling system with multiple power modes
04/30/2013US8432767 Clock mode determination in a memory system
04/30/2013US8432766 Multi-column addressing mode memory system including an integrated circuit memory device
04/30/2013US8432725 Static random access memory structure and control method thereof
04/30/2013US8432716 Semiconductor device with non-volatile memory and random access memory
04/25/2013US20130100758 Local word line driver
04/25/2013US20130100757 Dual-Port Memory and a Method Thereof
04/25/2013US20130100751 Precharge signal generation circuit, semiconductor device including the same, and method for generating precharge signal
04/25/2013US20130100750 Semiconductor device
04/24/2013CN103065672A Asynchronous static random access memory based on internet protocol (IP) of synchronous static random access memory
04/24/2013CN101461008B Non-volatile semiconductor memory with page erase
04/23/2013US8427899 Self-adaptive sensing design
04/23/2013US8427898 Method and apparatus for performing multi-block access operation in nonvolatile memory device
04/23/2013US8427878 Non-volatile memory devices, operating methods thereof and memory systems including the same
04/23/2013US8427861 Semiconductor memory device
04/23/2013CA2479944C Digital memory
04/23/2013CA2414920C A high speed dram architecture with uniform access latency
04/18/2013US20130094321 Semiconductor device having latency counter to control output timing of data and data processing system including the same
04/18/2013US20130094320 Address transforming circuits including a random code generator, and related semiconductor memory devices and methods
04/18/2013US20130094319 Method and Apparatus of Addressing A Memory Integrated Circuit
04/18/2013US20130094311 Dynamic phase shifter and staticizer
04/18/2013US20130094308 Negative word line driver for semiconductor memories
04/18/2013DE10261328B4 Kompensation überkreuzter Bitleitungen in DRAMs mit Redundanz Compensation of crossed bit lines in DRAMs with redundancy
04/16/2013US8422333 Semiconductor memory device and access method thereof
04/16/2013US8422332 Apparatus for generating a voltage and non-volatile memory device having the same
04/16/2013US8422331 Data output control circuit and data output control method
04/16/2013US8422330 Memory controller and memory controlling method
04/16/2013US8422323 Multi-bit test circuit of semiconductor memory apparatus
04/16/2013US8422321 Semiconductor memory device having regular area and spare area
04/16/2013CA2566067C Method and device for managing a bus
04/11/2013WO2013052329A1 Level shifter with negative voltage capability
04/11/2013US20130088927 System and method for generating a clock
04/11/2013US20130088913 Circuit and method of word line suppression
04/11/2013DE10010440B4 Synchrones dynamisches Speicherbauelement mit wahlfreiem Zugriff und Verfahren zur CAS-Latenzsteuerung Synchronous dynamic random access memory device and method for the CAS latency control
04/10/2013EP2577669A2 Methods and apparatuses for delay-locked loops and phase-locked loops
04/10/2013EP2577668A2 Memory arrays
04/09/2013US8417883 Concurrent memory bank access and refresh request queuing
04/09/2013US8416639 Multi-chip package and method of operating the same
04/09/2013US8416638 Semiconductor memory device removing parasitic coupling capacitance between word lines
04/04/2013WO2013048625A1 Alternating wordline connection in 8t cells for improving resiliency to multi-bit ser upsets
04/04/2013WO2013045970A1 Pseudo-inverter circuit with multiple independent gate transistors
04/04/2013US20130083619 Semiconductor device and method of operating the same
04/04/2013US20130083618 Apparatus and Method for Converting Static Memory Address to Memory Address Pulse
04/04/2013US20130083617 Semiconductor memory device and method for driving the same
04/04/2013DE102012217730A1 Halbleitervorrichtung und Verfahren des Betreibens von dieser Semiconductor device and method of operating this
04/03/2013CN103026415A Ferroelectric memories based on arrays of autonomous memory bits
04/03/2013CN101770802B Asymmetric sense amplifier
04/03/2013CN101636790B Decoding control with address transition detection in page erase function
04/03/2013CN101427319B Memory with clocked sense amplifier
04/02/2013US8412906 Memory apparatus supporting multiple width configurations
04/02/2013US8411528 Semiconductor device capable of adjusting memory page size based on a row address and a bank address
04/02/2013US8411492 Memory base cell and memory bank
03/2013
03/28/2013US20130077430 Semiconductor system
03/28/2013US20130077429 Semiconductor device verifying signal supplied from outside
03/28/2013US20130077428 Semiconductor device having pda function
03/28/2013US20130077427 Semiconductor device having cal latency function
03/28/2013US20130077426 Semiconductor storage apparatus and semiconductor integrated circuit
03/28/2013US20130077421 Failure diagnosis circuit
03/28/2013US20130077418 Dll circuit, frequency-multiplication circuit, and semiconductor memory device
03/28/2013US20130077417 Control of inputs to a memory device
03/27/2013CN101772810B Block addressing for parallel memory arrays
03/27/2013CN101256833B 半导体存储器件 A semiconductor memory device
03/26/2013US8407682 Software and method that enables selection of one of a plurality of online service providers
03/26/2013US8406079 Address output timing control circuit of semiconductor apparatus
03/26/2013US8406078 Memory circuits having a plurality of keepers
03/26/2013US8406077 Multi-voltage level, multi-dynamic circuit structure device
03/26/2013US8406074 Semiconductor device
03/26/2013US8406073 Hierarchical DRAM sensing
03/21/2013WO2013040066A1 Adaptive read wordline voltage boosting apparatus and method for multi-port sram
03/21/2013WO2013040065A1 Improving sram cell writability
03/21/2013WO2013040061A1 Apparatus for selective word-line boost on a memory cell
03/21/2013US20130070553 Semiconductor device having charge pump circuit and information processing apparatus including the same
03/21/2013US20130070552 Non-volatile memory device
03/21/2013US20130070541 Nonvolatile memory device
03/20/2013CN101729421B Storage method and device based on time division multiplex
03/19/2013US8400869 Semiconductor memory module
03/19/2013US8400868 Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
03/19/2013US8400867 Non-volatile memory with stray magnetic field compensation
03/19/2013US8400866 Voltage boosting in MRAM current drivers
03/19/2013US8400865 Memory macro configuration and method
03/19/2013US8400864 Mechanism for peak power management in a memory
03/19/2013US8400863 Configurable memory block
03/19/2013US8400846 Semiconductor integrated circuit with multi test
03/19/2013US8400805 Semiconductor device
03/14/2013US20130064030 Semiconductor devices, methods of operating semiconductor devices, and systems having the same
03/14/2013US20130064025 Dynamic data strobe detection
03/14/2013US20130064020 Semiconductor memory apparatus
03/14/2013US20130064006 Apparatus for Selective Word-Line Boost on a Memory Cell
03/14/2013DE102012108093A1 Speicherchip, Speichersystem und Verfahren zum Zugreifen auf den Speicherchip Memory chip, memory system and method for accessing the memory chip
03/13/2013CN102971796A Non-volatile memory and method with even/odd combined interleaved block decoding with adapted word line activation circuitry
03/13/2013CN101523501B Dynamic word line drivers and decoders for memory arrays
03/12/2013USRE44064 Semiconductor memory device and module for high frequency operation
03/12/2013US8395964 Row address decoder and semiconductor memory device having the same
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