Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
11/2012
11/06/2012US8305835 Memory elements having configurable access duty cycles and related operating methods
11/06/2012US8305834 Semiconductor memory with memory cell portions having different access speeds
11/06/2012US8305833 Memory chip architecture having non-rectangular memory banks and method for arranging memory banks
11/01/2012US20120275257 Semiconductor device and operating method thereof
11/01/2012US20120275240 Semiconductor memory device
11/01/2012US20120275238 Memory circuit and control method thereof
11/01/2012US20120275217 Low noise memory array
11/01/2012US20120275210 Non-volatile storage system with dual block programming
10/2012
10/31/2012CN102760476A Scalable memory system
10/30/2012US8300496 Semiconductor memory apparatus and test method thereof
10/30/2012US8300495 Block control command generation circuit
10/30/2012US8300494 Sub volt flash memory system
10/30/2012US8300493 Encoded read-only memory (ROM) decoder
10/30/2012US8300492 Memory
10/30/2012US8300491 Multiple bitcells tracking scheme for semiconductor memories
10/30/2012US8300490 Semiconductor memory and system
10/30/2012US8300479 Temporal alignment of data unit groups in a switch
10/30/2012US8300477 Piecewise erasure of flash memory
10/25/2012US20120269023 System with controller and memory
10/25/2012US20120269015 Command paths, apparatuses, memories, and methods for providing internal commands to a data path
10/25/2012US20120269014 Delay control circuit and semiconductor memory device including the same
10/25/2012US20120269012 Semiconductor integrated circuit and method for driving the same
10/25/2012US20120269006 Semiconductor device
10/23/2012US8295122 Input buffer circuit, semiconductor memory device and memory system
10/23/2012US8295121 Clock buffer and a semiconductor memory apparatus using the same
10/23/2012US8295120 Read command triggered synchronization circuitry
10/23/2012US8295119 Latency counter, semiconductor memory device including the same, and data processing system
10/23/2012US8295118 Self-timed interface for strobe-based systems
10/23/2012US8295107 Asynchronous pipelined memory access
10/23/2012US8295099 Dual port memory with write assist
10/23/2012US8295071 Apparatus and methods for optically-coupled memory systems
10/18/2012US20120263005 Memory apparatus and system with shared wordline decoder
10/18/2012US20120262999 Semiconductor memory device and operating method thereof
10/18/2012US20120262997 Method for searching optimum value of memory
10/18/2012US20120262992 Semiconductor device including multi-chip
10/16/2012US8289807 Selective edge phase mixing
10/16/2012US8289806 Multiple device apparatus, systems, and methods
10/16/2012US8289805 Non-volatile memory bank and page buffer therefor
10/16/2012US8289804 Semiconductor control line address decoding circuit
10/16/2012US8289803 System including vertically stacked embedded non-flash re-writable non-volatile memory
10/16/2012US8289802 System and memory for sequential multi-plane page memory operations
10/11/2012US20120257466 Duty cycle distortion correction
10/10/2012CN1697078B Semiconductor memory
10/10/2012CN101443852B Method and device for regulating digital delay function for regulating data memory cell
10/09/2012US8284621 Strobe offset in bidirectional memory strobe configurations
10/04/2012WO2012135102A2 Digitally controlled delay lines with fine grain and coarse grain delay elements, and methods and systems to adjust in fine grain increments
10/04/2012WO2012134755A2 Measurement initialization circuitry
10/04/2012US20120250445 Semiconductor apparatus
10/04/2012US20120250444 PSEUDO-INVERTER CIRCUIT ON SeOI
10/04/2012US20120250434 Method of accelerating write timing calibration and write timing calibration acceleration circuit in semiconductor memory device
10/04/2012US20120250433 Memory devices, systems and methods employing command/address calibration
10/04/2012US20120250426 Apparatus and Method to Adjust Clock Duty Cycle of Memory
10/04/2012DE102012204991A1 Speichereinrichtungen, Systeme und Verfahren unter Verwendung einer Befehls/Adressenkalibrierung Memory devices, systems and methods using a command / address calibration
10/04/2012DE10154272B4 Verfahren und Schaltung zum Erzeugen einer angehobenen Spannung für einen nichtflüchtigen ferroelektrischen Speicher Method and circuit for generating a boosted voltage for a nonvolatile ferroelectric memory
10/03/2012CN102708916A Address jump output device and method
10/02/2012US8279704 Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
10/02/2012US8279703 Sub-word line driver circuit and semiconductor memory device having the same
10/02/2012US8279702 Semiconductor apparatus
10/02/2012US8279701 Semiconductor storage device and control methods thereof
10/02/2012US8279699 Semiconductor memory device with reduced power noise
10/02/2012US8279651 Memory chip package with efficient data I/O control
10/02/2012CA2494148C Disc with temporary disc definition structure (tdds) and temporary defect list (tdfl), and method of and apparatus for managing defect in the same
09/2012
09/27/2012WO2012127177A1 Configuration memory cell
09/27/2012US20120246419 Concurrent memory bank access and refresh request queuing
09/27/2012US20120243365 Semiconductor memory device and method of setting operation environment therein
09/27/2012US20120243360 Semiconductor memory having staggered sense amplifiers associated with a local column decoder
09/27/2012US20120243355 Semiconductor apparatus
09/27/2012US20120243350 Address delay circuit of semiconductor memory apparatus
09/27/2012US20120243301 Memory devices and methods for high random transaction rate
09/26/2012EP2502233A2 Memory device and method thereof
09/25/2012CA2635284C System and method for low power wordline logic for a memory
09/20/2012US20120236676 Single transistor driver for address lines in a phase change memory and switch (pcms) array
09/20/2012US20120236675 Methods and Apparatus for Memory Word Line Driver
09/20/2012US20120236673 Semiconductor device
09/20/2012US20120236662 Word-line-potential control circuit
09/20/2012US20120236661 Semiconductor storage device
09/20/2012US20120235707 Nor-or decoder
09/19/2012EP2499667A1 PARALLELIZED CHECK POINTING USING MATs AND THROUGH SILICON VIAs (TSVs)
09/19/2012EP2499639A2 Memory arrays and associated methods of manufacturing
09/19/2012CN101185140B Memory for activating partial page, system and method
09/18/2012US8270247 Word line driving circuit and semiconductor storage device
09/18/2012US8270246 Optimized selection of memory chips in multi-chips memory devices
09/18/2012US8270245 Memory Device
09/18/2012US8270239 Semiconductor memory device and methods of performing a stress test on the semiconductor memory device
09/18/2012US8270236 Semiconductor memory device
09/18/2012US8269630 Methods and systems of a multiple radio frequency network node RFID tag
09/13/2012US20120230144 Semiconductor device
09/13/2012US20120230143 Static memory with segmented clear
09/13/2012US20120230141 Semiconductor device and data processing system
09/13/2012US20120230137 Memory device and test method for the same
09/13/2012US20120230107 Semiconductor memory device having memory block configuration
09/12/2012CN102667942A 存储器装置及其方法 A memory device and method
09/11/2012US8264907 Method of increasing a timing margin for writing data to a memory array
09/11/2012US8264906 Adjusting clock error across a circuit interface
09/11/2012US8264893 Semiconductor device
09/11/2012US8264872 Column decoder for non-volatile memory devices, in particular of the phase-change type
09/06/2012US20120224448 Delay efficient gater repeater
09/06/2012US20120224447 Semiconductor memory device having selective activation circuit for selectively activating circuit areas
09/06/2012US20120224442 Circuit with remote amplifier
09/06/2012US20120224435 Multiple-port memory device comprising single-port memory device with supporting control circuitry
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