Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
03/2004
03/09/2004US6704232 Performance for ICs with memory cells
03/09/2004US6704230 Error detection and correction method and apparatus in a magnetoresistive random access memory
03/09/2004US6704229 Semiconductor test circuit for testing a semiconductor memory device having a write mask function
03/09/2004US6704224 Non-volatile semiconductor memory apparatus
03/09/2004US6704223 Non-volatile semiconductor memory
03/09/2004US6704222 Multi-state operation of dual floating gate array
03/09/2004US6704217 Symmetric segmented memory array architecture
03/09/2004US6704020 Architecture for video compressor to efficiently address synchronous memory
03/09/2004US6703879 Clock generation circuit, control method of clock generation circuit and semiconductor memory device
03/09/2004US6703871 Amplifier for use in semiconductor integrated circuits
03/09/2004US6703870 High-speed sense amplifier with auto-shutdown precharge path
03/09/2004US6703848 Digitally controlled adaptive driver for sensing capacitive load
03/04/2004WO2004019339A2 Replacement memory device
03/04/2004WO2003032322A3 Adjustable memory self-timing circuit
03/04/2004WO2003003706A3 In vivo imaging device with a small cross sectional area
03/04/2004US20040044870 Multi-bank memory accesses using posted writes
03/04/2004US20040044838 Non-volatile memory module for use in a computer system
03/04/2004US20040044800 Method for handling persistent reservation registrations in a storage device
03/04/2004US20040042334 Semiconductor memory
03/04/2004US20040042333 Reducing digit equilibrate current during self-refresh mode
03/04/2004US20040042319 Semiconductor memory device informing internal voltage level using ready/busy pin
03/04/2004US20040042318 Current limiting antifuse programming path
03/04/2004US20040042317 Circuits and methods to protect a gate dielectric antifuse
03/04/2004US20040042315 Method for manufacture of MRAM memory elements
03/04/2004US20040042314 Semiconductor memory device
03/04/2004US20040042309 Isolation device over field in a memory device
03/04/2004US20040042306 Method of reducing variable retention characteristics in DRAM cells
03/04/2004US20040042305 Driving a dram sense amplifier having low threshold voltage pmos transistors
03/04/2004US20040042303 Method and system for accelerating coupling of digital signals
03/04/2004US20040042302 Method and article for concentrating fields at sense layers
03/04/2004US20040042301 Semiconductor memory device
03/04/2004US20040042300 Timing adjusting circuit and semiconductor memory device
03/04/2004US20040042292 Semiconductor device
03/04/2004US20040042286 Semiconductor device, method for fabricating the same, and method for driving the same
03/04/2004US20040042285 Semiconductor device and manufacturing method thereof
03/04/2004US20040042284 Flash memory for improving write access time
03/04/2004US20040042281 Semiconductor memory device
03/04/2004US20040042276 Bias sensing in dram sense amplifiers
03/04/2004US20040042275 Semiconductor memory device internally generating internal data read timing
03/04/2004US20040042274 Methods and systems for programmable memory using silicided poly-silicon fuses
03/04/2004US20040042257 Semiconductor memory device having partially controlled delay locked loop
03/04/2004US20040042255 Method and apparatus for latency specific duty cycle correction
03/04/2004US20040042242 System and method to avoid voltage read errors in open digit line array dynamic random access memories
03/04/2004US20040041612 Amplifiers with variable swing control
03/04/2004US20040041607 Method and circuit for generating constant slew rate output signal
03/04/2004US20040041606 Synchronous mirror delay (smd) circuit and method including a ring oscillator for timing coarse and fine delay intervals
03/04/2004US20040041236 Merged mos-bipolar capacitor memory cell
03/04/2004DE10337047A1 Erfassungsverstärker mit einseitigem Zurückschreiben Sense amplifier with unilateral rewriting
03/04/2004DE10300026A1 Verwaltungssystem für Zugriffs-Steuermodi eines DRAM-Modul-Sockels Management system for access control modes of a DRAM module socket
03/04/2004DE10237624A1 Gerät für die Aufzeichnung von digitalen Signalen Device for the recording of digital signals
03/03/2004EP1394808A2 Semiconductor memory
03/03/2004EP1393321A1 Propagation delay independent sdram data capture device and method
03/03/2004EP0906620B1 Device and method for recording an information signal in a recording carrier
03/03/2004CN1479925A 边界可寻址存储器 Addressable memory boundary
03/03/2004CN1479378A 半导体存储器 Semiconductor memory
03/03/2004CN1479319A Reference eurrent producing circuit of multiple allocation flash storage
03/03/2004CN1479318A Reference current producing circuit of multiple allocation flash storage
03/03/2004CN1479315A Non volatibility storage
03/03/2004CN1479313A Semiconductor storing device and semiconductor integrated circuit
03/03/2004CN1479310A 存取电路 Access circuit
03/03/2004CN1479309A Method and device for repairing shortage of memory
03/03/2004CN1479308A Storage access method
03/03/2004CN1140904C Synchronous semiconductor memory device with clock generating circuit
03/02/2004US6701484 Register file with delayed parity check
03/02/2004US6701446 Power control system for synchronous memory device
03/02/2004US6701419 Interlaced memory device with random or sequential access
03/02/2004US6700831 Integrated memory having a plurality of memory cell arrays and method for operating the integrated memory
03/02/2004US6700828 Semiconductor memory device
03/02/2004US6700827 Cam circuit with error correction
03/02/2004US6700816 Semiconductor storage device conducting a late-write operation and controlling a test read-operation to read data not from a data latch circuit but from a memory core circuit regardless
03/02/2004US6700814 Sense amplifier bias circuit for a memory having at least two distinct resistance states
03/02/2004US6700437 Semiconductor device including logic circuit and macro circuit which has a function for stopping a direct current
03/02/2004US6700415 Sense amplifier with configurable voltage swing control
03/02/2004US6700169 Semiconductor memory device
03/02/2004US6700168 Layout structure and method of a column path of a semiconductor memory device
02/2004
02/26/2004WO2004017326A2 Dual loop sensing scheme for resistive memory elements
02/26/2004WO2003100786A3 Serially sensing the output of multilevel cell arrays
02/26/2004US20040039883 Modified persistent auto precharge command protocol system and method for memory devices
02/26/2004US20040039873 Management system for access control modes of a DRAM module socket
02/26/2004US20040039871 Replacement memory device
02/26/2004US20040039857 Data transfer control method, and peripheral circuit, data processor and data processing system for the method
02/26/2004US20040039854 Flash memory card with enhanced operating mode detection and user-friendly interfacing system
02/26/2004US20040038478 Dual-damascene bit line structures for microelectronic devices and methods of fabricating microelectronic devices
02/26/2004US20040038457 Stress balanced semiconductor packages, method of fabrication and modified mold segment
02/26/2004US20040037540 Associating audio and image data
02/26/2004US20040037158 Circuit and method for reading data transfers that are sent with a source synchronous clock signal
02/26/2004US20040037157 Synchronous memory with open page
02/26/2004US20040037152 Non-volatile memory device conducting comparison operation
02/26/2004US20040037148 improved gate dielectric characteristics
02/26/2004US20040037146 Diffusion replica delay circuit
02/26/2004US20040037145 for storing audio information with corresponding text information and type information
02/26/2004US20040037140 Sense amplifier drive circuits responsive to predecoded column addresses and methods for operating the same
02/26/2004US20040037139 reduced in chip size with a reduction in chip cost
02/26/2004US20040037138 Direct read of dram cell using high transfer ratio
02/26/2004US20040037137 precharging a second node in said memory array, said second node on a same word line as said first node, wherein said second node is separated from said first node by at least one intervening node in said same word line
02/26/2004US20040037130 Voltage and temperature compensated pulse generator
02/26/2004US20040037129 Method for reading a memory cell in a semiconductor memory, and semiconductor memory
02/26/2004US20040037127 utilize differential pFET floating gate transistors to store information
02/26/2004US20040037126 Clock-synchronous semiconductor memory device
02/26/2004US20040037123 Integrated circuit devices including equalization/precharge circuits for improving signal transmission