| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 03/05/2015 | WO2015030937A1 Offset canceling dual stage sensing circuit |
| 03/05/2015 | US20150067275 Single port memory that emulates dual port memory |
| 03/05/2015 | US20150063048 Sample-and-Hold Current Sense Amplifier and Related Method |
| 03/05/2015 | US20150063047 Semiconductor memory device, method of operating the same and memory system including the same |
| 03/05/2015 | US20150063046 Memory timing circuit |
| 03/05/2015 | US20150063044 Strobe signal generation device and memory apparatus using the same |
| 03/05/2015 | US20150063043 Apparatuses and methods for providing strobe signals to memories |
| 03/05/2015 | US20150063042 Regulation circuit for a charge pump and method of regulation |
| 03/05/2015 | US20150063022 Apparatuses and methods involving accessing distributed sub-blocks of memory cells |
| 03/05/2015 | US20150063012 Offset canceling dual stage sensing circuit |
| 03/05/2015 | US20150063008 Input data alignment circuit and semiconductor device including the same |
| 03/05/2015 | US20150062999 Memory device, memory module including the memory device, method of fabricating the memory module, and method of repairing the memory module |
| 03/05/2015 | DE112012006472T5 Mindestens teilweises Isolieren von lokaler Zeilen- oder Spaltenschaltung von Speicherzellen vor dem Erzeugen einer Spannungsdifferenz zum Ermöglichen des Auslesens der Zelle At least partially isolating the local row or column of memory cells before the circuit generating a voltage difference for enabling the readout of the cell |
| 03/04/2015 | EP2842036A1 Local checkpointing using a multi-level cell |
| 03/03/2015 | US8972822 Memory module and semiconductor storage device |
| 03/03/2015 | US8972685 Method, apparatus and system for exchanging communications via a command/address bus |
| 03/03/2015 | US8972669 Page buffering in a virtualized, memory sharing configuration |
| 03/03/2015 | US8971146 Dual-port SRAM with bit line clamping |
| 03/03/2015 | US8971144 Hardware write-protection |
| 03/03/2015 | US8971143 Semiconductor device periodically updating delay locked loop circuit |
| 03/03/2015 | US8971142 Semiconductor memory device and method of operating the same |
| 03/03/2015 | US8971141 Compact high speed sense amplifier for non-volatile memory and hybrid lockout |
| 03/03/2015 | US8971140 Semiconductor device and data processing system comprising semiconductor device |
| 03/03/2015 | US8971139 Semiconductor device and data processing system |
| 03/03/2015 | US8971136 Memory device correcting the effect of collision of high-energy particles |
| 03/03/2015 | US8971135 Semiconductor memory device receiving data in response to data strobe signal, memory system including the same and operating method thereof |
| 03/03/2015 | US8971134 Memory controller comprising adjustable transmitter impedance |
| 03/03/2015 | US8971133 Memory device and method of operation of such a memory device |
| 03/03/2015 | US8971132 Semiconductor device, method for controlling the same, and semiconductor system |
| 03/03/2015 | US8971131 Data circuit |
| 03/03/2015 | US8971122 Group based read reference voltage management in flash memory |
| 03/03/2015 | US8971107 Emulation of static random access memory (SRAM) by magnetic random access memory (MRAM) |
| 03/03/2015 | US8971098 Latch-based array with enhanced read enable fault testing |
| 03/03/2015 | US8971094 Replacement of a faulty memory cell with a spare cell for a memory circuit |
| 03/03/2015 | US8971086 Capacitorless DRAM on bulk silicon |
| 03/03/2015 | US8971085 Self-refresh adjustment in memory devices configured for stacked arrangements |
| 03/03/2015 | US8970256 Sense amplifier |
| 03/03/2015 | US8970250 Configuration context switcher with a latch |
| 02/26/2015 | WO2015024242A1 Address change monitoring circuit and apparatus, and generating method therefor |
| 02/26/2015 | US20150058667 Method And Apparatus For A Zero Voltage Processor |
| 02/26/2015 | US20150055426 Novel sense amplifier scheme |
| 02/26/2015 | US20150055425 Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory |
| 02/26/2015 | US20150055424 On-The-Fly Trimmable Sense Amplifier |
| 02/26/2015 | US20150055423 Semiconductor memory apparatus |
| 02/26/2015 | US20150055422 Semiconductor memory apparatus |
| 02/26/2015 | US20150055421 Semiconductor device |
| 02/26/2015 | US20150055420 Apparatuses and methods for selective row refreshes |
| 02/26/2015 | US20150055400 Programmable delay introducing circuit in self timed memory |
| 02/26/2015 | US20150055398 Semiconductor integrate circuit |
| 02/26/2015 | US20150055389 Self-timed, single-ended sense amplifier |
| 02/26/2015 | DE112006003224B4 Polaritätsbetriebener dynamischer, schaltkreisintegrierter Abschluss Polarity-powered dynamic, circuitry integrated termination |
| 02/24/2015 | US8966615 Security device and display method thereof |
| 02/24/2015 | US8966180 Scatter-gather intelligent memory architecture for unstructured streaming data on multiprocessor systems |
| 02/24/2015 | US8966153 Semiconductor memory device and information data processing apparatus including the same |
| 02/24/2015 | US8964499 Row decoding circuit |
| 02/24/2015 | US8964497 Bit line sense amplifier and layout method therefor |
| 02/24/2015 | US8964496 Apparatuses and methods for performing compare operations using sensing circuitry |
| 02/24/2015 | US8964494 memories and methods for repair in open digit memory architectures |
| 02/24/2015 | US8964492 Tracking mechanism for writing to a memory cell |
| 02/24/2015 | US8964491 Graphene-based memory devices and methods therefor |
| 02/24/2015 | US8964490 Write driver circuit with low voltage bootstrapping for write assist |
| 02/24/2015 | US8964489 Semiconductor memory device capable of optimizing an operation time of a boosting circuit during a writing period |
| 02/24/2015 | US8964488 Non-volatile memory device using variable resistance element with an improved write performance |
| 02/24/2015 | US8964487 Semiconductor memory device |
| 02/24/2015 | US8964486 Semiconductor device and operating method thereof |
| 02/24/2015 | US8964485 Memory circuit with transistors having different threshold voltages and method of operating the memory circuit |
| 02/24/2015 | US8964484 For test (DFT) read speed through transition detector in built-in self-test (BIST) sort |
| 02/24/2015 | US8964483 Semiconductor device and memory system |
| 02/24/2015 | US8964479 Techniques for sensing a semiconductor memory device |
| 02/24/2015 | US8964478 Semiconductor device |
| 02/24/2015 | US8964477 Nonvolatile memory, electronic apparatus, and verification method |
| 02/24/2015 | US8964452 Programmable resistance-modulated write assist for a memory device |
| 02/24/2015 | US8964451 Memory cell system and method |
| 02/24/2015 | US8964439 Semiconductor device having hierarchical bit line structure |
| 02/24/2015 | US8963624 Boosting circuit |
| 02/24/2015 | US8963606 Clock control device |
| 02/24/2015 | US8963591 Clock signal initialization circuit and its method |
| 02/24/2015 | US8963582 Signal amplification circuit and method |
| 02/24/2015 | US8963577 Termination impedance apparatus with calibration circuit and method therefor |
| 02/24/2015 | US8963532 Reference current distribution |
| 02/24/2015 | US8963053 Programmable delay introducing circuit in self-timed memory |
| 02/19/2015 | WO2015023445A1 APPARATUSES AND METHODS FOR CONFIGURING I/Os OF MEMORY FOR HYBRID MEMORY MODULES |
| 02/19/2015 | US20150049567 Memory and memory system including the same |
| 02/19/2015 | US20150049566 Memory and memory system including the same |
| 02/19/2015 | US20150049565 Apparatuses and methods for reducing current leakage in a memory |
| 02/19/2015 | US20150049563 Memory device and method of performing access operations within such a memory device |
| 02/19/2015 | US20150049560 Circuit Arrangement and Method for Operating a Circuit Arrangement |
| 02/19/2015 | US20150049559 Semiconductor devices, semiconductor systems including the same, and methods of inputting data into the same |
| 02/19/2015 | US20150049558 Dynamic burst length output control in a memory |
| 02/19/2015 | DE102014111813A1 Schaltungsanordnung und verfahren zum betreiben einer schaltungsanordnung Circuit arrangement and method for operating a circuit arrangement |
| 02/19/2015 | DE102005017686B4 Phasenregelkreis, Speichereinheit, Speichersystem und Betreibsverfahren Phase-locked loop, memory device, memory system and Betreibsverfahren |
| 02/18/2015 | EP2838089A2 Metastability prediction and avoidance in memory arbitration circuitry |
| 02/18/2015 | EP2837000A1 Apparatuses and methods for providing set and reset voltages at the same time |
| 02/18/2015 | EP2836997A1 Data generating system and lighting device |
| 02/17/2015 | US8959294 Storage device, host device, circuit board, liquid container, and system |
| 02/17/2015 | US8959291 Two-port memory capable of simultaneous read and write |
| 02/17/2015 | US8959283 Flash storage controller execute loop |
| 02/17/2015 | US8959282 Flash storage controller execute loop |
| 02/17/2015 | US8959271 System and method for accessing memory |
| 02/17/2015 | US8958260 Systems and methods for voltage sensing and reporting |