| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 04/20/2004 | US6724677 ESD device used with high-voltage input pad |
| 04/20/2004 | US6724676 Soft error improvement for latches |
| 04/20/2004 | US6724675 Semiconductor memory device and electronic apparatus |
| 04/20/2004 | US6724674 Memory storage device with heating element |
| 04/20/2004 | US6724673 Memory reading device |
| 04/20/2004 | US6724672 Integrated memory having a precharge circuit for precharging a bit line |
| 04/20/2004 | US6724666 Method of synchronizing read timing in a high speed memory system |
| 04/20/2004 | US6724665 Memory device and method for selectable sub-array activation |
| 04/20/2004 | US6724662 Method of recovering overerased bits in a memory device |
| 04/20/2004 | US6724658 Method and circuit for generating reference voltages for reading a multilevel memory cell |
| 04/20/2004 | US6724646 Dummy cell structure for 1T1C FeRAM cell array |
| 04/20/2004 | US6724645 Method and apparatus for shortening read operations in destructive read memories |
| 04/20/2004 | US6724378 Display driver and display unit and electronic apparatus utilizing the same |
| 04/20/2004 | US6724226 Signal transmission circuit capable of tolerating high-voltage input signal |
| 04/20/2004 | US6724223 Semiconductor device used in two systems having different power supply voltages |
| 04/15/2004 | WO2004032146A2 Programmable magnetic memory device fp-mram |
| 04/15/2004 | US20040073770 Access circuit |
| 04/15/2004 | US20040071066 Determining emitter beam size for data storage medium |
| 04/15/2004 | US20040071061 Method and system for buffering data file to buffer memory |
| 04/15/2004 | US20040071040 Memory module and memory system |
| 04/15/2004 | US20040071037 Dual bus memory burst architecture |
| 04/15/2004 | US20040071035 Memory module with a heat dissipation means |
| 04/15/2004 | US20040071033 Enhanced protection for input buffers of low-voltage flash memories |
| 04/15/2004 | US20040071029 Crystal oscillator emulator |
| 04/15/2004 | US20040071027 Wrong operation preventing circuit in semiconductor unit |
| 04/15/2004 | US20040071018 Non-destructive readout |
| 04/15/2004 | US20040071015 Data strobe gating for source synchronous communications interface |
| 04/15/2004 | US20040070435 Duty ratio detecting apparatus with small return time |
| 04/15/2004 | US20040069984 Terahertz interconnect system and applications |
| 04/15/2004 | DE10347055A1 Data access method for dynamic random access memory, involves generating page mode enable signal for maintaining activated state of primary word line corresponding to primary address while activating secondary word line |
| 04/15/2004 | DE10343525A1 Method for control of semiconductor building blocks esp. memory blocks in electronic systems, such as computer working memory, involves selecting group of semiconductor blocks |
| 04/15/2004 | DE10342474A1 Anzeige der Systemoperationsfrequenz an einen DRAM während des Einschaltens Displays the system operation frequency to a DRAM during power |
| 04/15/2004 | DE10341557A1 DQS-Postambel-Rauschunterdrückung durch Erzwingen einer minimalen Pulslänge DQS postamble noise reduction by enforcing a minimum pulse length |
| 04/15/2004 | DE10334387A1 System und Verfahren zum Überwachen interner Spannungen auf einer integrierten Schaltung System and method for monitoring internal voltages on an integrated circuit |
| 04/15/2004 | DE10323458A1 Speichersystem, das einen schnellen Prozessorbetrieb gestattet, während ein Flash-Speicher verwendet wird, bei dem kein Direktzugriff möglich ist Memory system which allows a fast processor operation while a flash memory is used in which no direct access is possible |
| 04/15/2004 | DE10245536A1 IC calibration method, especially for the output driver parameters, OCD and ODT, on chip driver and on die terminations, of DDR-DRAMs, whereby a common calibration reference is connected via a bus to multiple units |
| 04/15/2004 | DE10196802T5 Rauschunterdrückung für DRAM-Architekturen mit offener Bitleitung Noise Reduction for DRAM architectures open bit line |
| 04/14/2004 | EP1408516A1 A fuse blowing interface for a memory chip |
| 04/14/2004 | EP1408508A1 Storage device |
| 04/14/2004 | EP1408492A2 Determining emitter beam size for data storage medium |
| 04/14/2004 | EP1407456A2 Writing apparatus, semiconductor memory card, writing proguram, and writing method |
| 04/14/2004 | EP1407455A2 Method and apparatus for determining actual write latency and accurately aligning the start of data capture with the arrival of data at a memory device |
| 04/14/2004 | EP0976133B1 Memory device and method |
| 04/14/2004 | CN1489200A Multi chip assemble and multi chip closing method |
| 04/14/2004 | CN1489155A Semiconductor storage and control method thereof |
| 04/14/2004 | CN1489154A Semiconduetor storage device based on pseudo-unit method |
| 04/14/2004 | CN1489153A Semiconductor storage device having multiple-9 data input/output structure |
| 04/14/2004 | CN1145969C Interleaved sense amplifier with single-sided precharge device |
| 04/13/2004 | US6721933 Input/output cell placement method and semiconductor device |
| 04/13/2004 | US6721860 Method for bus capacitance reduction |
| 04/13/2004 | US6721842 Boundary addressable memory |
| 04/13/2004 | US6721830 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures |
| 04/13/2004 | US6721819 Flash memory card with enhanced operating mode detection and user-friendly interfacing system |
| 04/13/2004 | US6721233 Circuit and method for reducing memory idle cycles |
| 04/13/2004 | US6721230 Integrated memory with memory cells in a plurality of memory cell blocks, and method of operating such a memory |
| 04/13/2004 | US6721229 Method and apparatus for using SDRAM to read and write data without latency |
| 04/13/2004 | US6721228 Semiconductor memory device using a protocol transmission method |
| 04/13/2004 | US6721226 Methods and systems for reducing heat flux in memory systems |
| 04/13/2004 | US6721222 Noise suppression for open bit line DRAM architectures |
| 04/13/2004 | US6721221 Sense amplifier and architecture for open digit arrays |
| 04/13/2004 | US6721219 Method and circuit arrangement for reading out and for storing binary memory cell signals |
| 04/13/2004 | US6721218 Semiconductor memory device and data read method thereof |
| 04/13/2004 | US6721217 Method for memory sensing |
| 04/13/2004 | US6721214 Drive circuit and control method |
| 04/13/2004 | US6721213 Electronic circuit and semiconductor storage device |
| 04/13/2004 | US6721212 Memory control circuit and control system for a plurality of memories interconnected via plural logic interfaces |
| 04/13/2004 | US6721211 Voltage generator for semiconductor memory device |
| 04/13/2004 | US6721209 Semiconductor memory device |
| 04/13/2004 | US6721200 Dummy cell structure for 1T1C FeRAM cell array |
| 04/13/2004 | US6721194 Semiconductor memory |
| 04/13/2004 | US6720815 Phase adjustor for semiconductor integrated circuit |
| 04/13/2004 | US6720589 Semiconductor device |
| 04/13/2004 | US6720216 Programmable memory address and decode circuits with vertical body transistors |
| 04/13/2004 | CA2320675C Method and system for storing and accessing data in a compound document using object linking |
| 04/08/2004 | WO2004029984A2 Non-volatile memory and its sensing method |
| 04/08/2004 | WO2004029979A1 Improved sensing of memory integrated circuits |
| 04/08/2004 | WO2004029978A1 Highly compact non-volatile memory and method therefor with internal serial buses |
| 04/08/2004 | WO2004029977A1 Highly compact non-volatile memory with space-efficient data registers and method therefor |
| 04/08/2004 | WO2004029976A1 Highly compact non-volatile memory and method thereof |
| 04/08/2004 | WO2004029975A1 Non-volatile memory and method with reduced bit line crosstalk errors |
| 04/08/2004 | WO2004029974A1 Method and apparatus for enhancing the efficiency of dynamic ram |
| 04/08/2004 | WO2004008326A3 System and method for improved synchronous data access |
| 04/08/2004 | US20040068633 Memory access collision avoidance scheme |
| 04/08/2004 | US20040066701 Method and apparatus for operating a semiconductor memory at double data transfer rate |
| 04/08/2004 | US20040066700 Circuits and methods for providing page mode operation in semiconductor memory device having partial activation architecture |
| 04/08/2004 | US20040066697 Multiport memory circuit composed of 1Tr-1C memory cells |
| 04/08/2004 | US20040066696 Ultra-low current band-gap reference |
| 04/08/2004 | US20040066690 Error detection system for an information storage device |
| 04/08/2004 | US20040066689 Memory storage device which regulates sense voltages |
| 04/08/2004 | US20040066678 Magnetic memory device implementing read operation tolerant to bitline clamp voltage (VREF) |
| 04/08/2004 | US20040066673 Memory device and system having a variable depth write buffer and preload method |
| 04/08/2004 | US20040066671 Memory device and method for selectable sub-array activation |
| 04/08/2004 | US20040065904 Data inversion circuit and semiconductor device |
| 04/08/2004 | DE19825034B4 Pegelumsetzerschaltung Level shift circuit |
| 04/08/2004 | DE10345116A1 Bitleitungsausgleichssystem für eine integrierte DRAM-Schaltung Bitleitungsausgleichssystem for a DRAM integrated circuit |
| 04/08/2004 | DE10245248A1 Semiconductor memory module for acting as a dual in-line memory module has multiple dynamic or static/shadow RAM components and memory parameter devices |
| 04/08/2004 | DE10158271B4 Halbleiterschaltungsanordnung mit Abschlussimpedanzeinrichtung Semiconductor circuitry with termination impedance device |
| 04/08/2004 | DE10145745B4 Integrierte Schaltung und Verfahren zu ihrem Betrieb Integrated circuit and method for its operation |
| 04/08/2004 | DE10139724B4 Integrierter dynamischer Speicher mit Speicherzellen in mehreren Speicherbänken und Verfahren zum Betrieb eines solchen Speichers Integrated dynamic memory with memory cells in a plurality of memory banks, and method for operating such a memory, |
| 04/07/2004 | EP1406267A1 Semiconductor memory |