| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 02/12/2004 | US20040027893 Semiconductor device and method for controlling semiconductor device |
| 02/12/2004 | US20040027892 Semiconductor memory device with offset-compensated sensing scheme |
| 02/12/2004 | US20040027885 Device and method for decoding an address word into word-line signals |
| 02/12/2004 | US20040027874 Offset compensated sensing for magnetic random access memory |
| 02/12/2004 | US20040027867 Management of a memory subsystem |
| 02/12/2004 | US20040027862 Input buffer circuit of a synchronous semiconductor memory device |
| 02/12/2004 | US20040027851 Memory cell and circuit with multiple bit lines |
| 02/12/2004 | US20040027848 6F2 architecture ROM embedded dram |
| 02/12/2004 | US20040027178 Signal buffer for high-speed signal transmission and signal line driving circuit including the same |
| 02/12/2004 | US20040027172 Current switching sensor detector |
| 02/12/2004 | US20040026741 Semiconductor integrated circuit device |
| 02/12/2004 | DE19756929B4 Zellenarray und Leseverstärkerstruktur mit verbesserten Rauscheigenschaften und verringerter Größe Cell array and sense amplifier structure with improved noise characteristics and reduced size |
| 02/12/2004 | DE10335314A1 Multichip module and disconnection process has two semiconductor chips in the same housing and a temperature sensor in one chip only |
| 02/12/2004 | DE10335012A1 Halbleiterspeicherbauelement mit mehreren Speicherfeldern und zugehöriges Datenverarbeitungsverfahren A semiconductor memory device having a plurality of memory arrays and associated data processing method |
| 02/12/2004 | DE10333090A1 RAM-Daten Array ausgelegt als datenunabhängige, schreibzylus-kohärente Stromaufnahme RAM data array configured as data-independent, schreibzylus-coherent power consumption |
| 02/12/2004 | DE10240345B3 Read-out circuit for dynamic memory includes circuitry eliminating e.g. manufacturing differences between paired memory cells |
| 02/12/2004 | DE10154066B4 Integrierter Speicher und Verfahren zum Betrieb eines integrierten Speichers Integrated memory and method of operating an integrated memory |
| 02/12/2004 | DE10149099B4 Digitale Speicherschaltung mit mehreren Speicherbereichen Digital memory circuit having a plurality of storage areas |
| 02/12/2004 | DE10010888B4 Schaltungsanordnung und Verfahren zum Bewerten von Kapazitäten in Matrizen Circuit arrangement and method for evaluating capacity-matrices |
| 02/11/2004 | EP1388207A1 Apparatus/method for distributing a clock signal |
| 02/11/2004 | CN1474416A Semiconductor storage of shortening detection time |
| 02/11/2004 | CN1474415A System and method for simulating EEPROM with flash memory |
| 02/11/2004 | CN1474414A Non-volatile memory storage system needing no redundant column and its writing -in method |
| 02/11/2004 | CN1474410A Semiconductor storage capable of stably working |
| 02/11/2004 | CN1474288A Differential voltage type storage bus |
| 02/11/2004 | CN1138277C RDRAM module connecting device |
| 02/10/2004 | US6691247 Circuit and method for masking a dormant memory cell |
| 02/10/2004 | US6691214 DDR II write data capture calibration |
| 02/10/2004 | US6691204 Burst write in a non-volatile memory device |
| 02/10/2004 | US6690615 Semiconductor integrated circuit device |
| 02/10/2004 | US6690614 Semiconductor integrated circuit device |
| 02/10/2004 | US6690611 Cancellation of redundant elements with a cancel bank |
| 02/10/2004 | US6690609 Memory device and method having data path with multiple prefetch I/O configurations |
| 02/10/2004 | US6690608 Semiconductor memory device with internal data reading timing set precisely |
| 02/10/2004 | US6690607 Method and apparatus for low power memory |
| 02/10/2004 | US6690606 Asynchronous interface circuit and method for a pseudo-static memory device |
| 02/10/2004 | US6690605 Logic signal level converter circuit and memory data output buffer using the same |
| 02/10/2004 | US6690604 Register files and caches with digital sub-threshold leakage current calibration |
| 02/10/2004 | US6690603 Microcomputer including a flash memory that is two-way programmable |
| 02/10/2004 | US6690193 One-time end-user-programmable fuse array circuit and method |
| 02/05/2004 | WO2004012196A2 Semiconductor memory device and method for initializing the same |
| 02/05/2004 | WO2003090230A3 Variable delay compensation for data-dependent mismatch in characteristic of opposing devices of a sense amplifier |
| 02/05/2004 | US20040024959 System and method for optically interconnecting memory devices |
| 02/05/2004 | US20040024957 Window-based flash memory storage system and management and access methods thereof |
| 02/05/2004 | US20040022249 Semiconductor memory device having faulty cells |
| 02/05/2004 | US20040022118 Semiconductor memory device and associated data read method |
| 02/05/2004 | US20040022111 Memory architecture for increased speed and reduced power consumption |
| 02/05/2004 | US20040022107 Unidirectional bus architecture for SoC applications |
| 02/05/2004 | US20040022106 Integrated synchronous memory and memory configuration having a memory module with at least one synchronous memory |
| 02/05/2004 | US20040022105 Semiconductor memory device and method of manufacturing the same |
| 02/05/2004 | US20040022104 Program reception/execution apparatus that can commence execution of a machine program having only received the program in part, and a program transmission apparatus that enables such execution |
| 02/05/2004 | US20040022100 Semiconductor memory having a configuration of memory cells |
| 02/05/2004 | US20040022099 FIFO memory and semiconductor device |
| 02/05/2004 | US20040022097 Magnetic random access memory device capable of providing a constant current to a reference cell |
| 02/05/2004 | US20040022096 Method and apparatus for rewriting program executed in disk drive |
| 02/05/2004 | US20040022095 Asynchronous memory using source synchronous transfer and system employing the same |
| 02/05/2004 | US20040022088 Programmable DQS preamble |
| 02/05/2004 | DE19751990B4 Datenausgangspuffer für eine Speichereinrichtung Data output buffer for a memory device |
| 02/05/2004 | DE10229163B3 Speicherbaustein mit gekreuzten Bitleitungen und Verfahren zum Auslesen Memory module with crossed bit lines and method for reading |
| 02/05/2004 | DE10161042B4 Verfahren zum Betreiben eines Halbleiterspeichers und Halbleiterspeicher A method of operating a semiconductor memory and semiconductor memory |
| 02/04/2004 | EP1387362A2 Reading circuit, reference circuit, and semiconductor memory device |
| 02/04/2004 | EP1387360A2 Cubic memory array |
| 02/04/2004 | CN1472812A Semiconductor memory device with signal distributive circuits formed above memory unit |
| 02/04/2004 | CN1472810A Semiconductor integrated circuits |
| 02/04/2004 | CN1472747A Rewritable non-volatile memory system and method |
| 02/04/2004 | CN1472629A Method and device for rewriting program carried in disc drive |
| 02/04/2004 | CN1472615A Format clock distributing network for reducing time pulse phase differences and method thereof |
| 02/03/2004 | US6687843 Rambus DRAM with clock control circuitry that reduces power consumption |
| 02/03/2004 | US6687185 Method and apparatus for setting and compensating read latency in a high speed DRAM |
| 02/03/2004 | US6687184 Memory device having selectable clock input and method for operating same |
| 02/03/2004 | US6687183 Compiled variable internal self time memory |
| 02/03/2004 | US6687181 Semiconductor memory device with less data transfer delay time |
| 02/03/2004 | US6687176 First bit databurst firing of IO equilibrating ending signal based on column access signal |
| 02/03/2004 | US6687175 Semiconductor device |
| 02/03/2004 | US6687174 Semiconductor memory device capable of switching output data width |
| 02/03/2004 | US6687172 Individual memory page activity timing method and system |
| 02/03/2004 | US6687170 System and method for storing parity information in fuses |
| 02/03/2004 | US6687169 Semiconductor memory device for providing address access time and data access time at a high speed |
| 02/03/2004 | US6687168 Method for writing data bits to a memory array |
| 02/03/2004 | US6687166 Bus interface circuit and receiver circuit |
| 02/03/2004 | US6687165 Temperature-compensated output buffer circuit |
| 02/03/2004 | US6687163 Semiconductor memory arrangement |
| 02/03/2004 | US6687161 Sensing scheme for low-voltage flash memory |
| 02/03/2004 | US6687158 Gapless programming for a NAND type flash memory |
| 02/03/2004 | US6687148 High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines |
| 02/03/2004 | US6687147 Cubic memory array with diagonal select lines |
| 02/03/2004 | US6686762 Memory module using DRAM package to match channel impedance |
| 01/29/2004 | WO2004010435A2 A system, apparatus, and method for a flexible dram architecture |
| 01/29/2004 | WO2003050690A3 Sequential nibble burst ordering for data |
| 01/29/2004 | US20040019756 Memory device supporting a dynamically configurable core organization |
| 01/29/2004 | US20040019743 FIFO memory devices having multi-port cache memory arrays therein that support hidden EDC latency and bus matching and methods of operating same |
| 01/29/2004 | US20040019738 Adaptive throttling of memory accesses, such as throttling RDRAM accesses in a real-time system |
| 01/29/2004 | US20040018004 Audio recording and playback device |
| 01/29/2004 | US20040017724 Semiconductor processing device |
| 01/29/2004 | US20040017718 Non-volatile semiconductor memory device conducting read operation using a reference cell |
| 01/29/2004 | US20040017717 Differential amplifier circuit with high amplification factor and semiconductor memory device using the differential amplifier circuit |
| 01/29/2004 | US20040017716 Dynamic RAM-and semiconductor device |
| 01/29/2004 | US20040017714 Synchronous SRAM-compatible memory and method of driving the same |
| 01/29/2004 | US20040017707 Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems |
| 01/29/2004 | US20040017705 A Semiconductor memory device having improved arrangement for replacing failed bit lines |