| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 06/02/2004 | CN1501403A Semiconductor memory circuit |
| 06/02/2004 | CN1501401A Thin film magnetic memory device provided with magnetic tunnel junctions |
| 06/02/2004 | CN1152421C Method for testing circuit |
| 06/01/2004 | US6745354 Memory redundancy implementation |
| 06/01/2004 | US6745302 Method and circuit for enabling a clock-synchronized read-modify-write operation on a memory array |
| 06/01/2004 | US6745267 Multi-functional mini-memory card suitable for SFMI and USB interfaces |
| 06/01/2004 | US6744837 Clock switching circuit |
| 06/01/2004 | US6744692 Memory system's improvement in efficiency of data process between host, buffer memory and nonvolatile memory |
| 06/01/2004 | US6744690 Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (DRAM) arrays and embedded DRAM |
| 06/01/2004 | US6744689 Semiconductor memory device having a stable internal power supply voltage |
| 06/01/2004 | US6744687 Semiconductor memory device with mode register and method for controlling deep power down mode therein |
| 06/01/2004 | US6744685 Semiconductor device, method for refreshing the same, and electronic equipment |
| 06/01/2004 | US6744679 Semiconductor memory device |
| 06/01/2004 | US6744678 Semiconductor memory device capable of masking undesired column access signal |
| 06/01/2004 | US6744673 Feedback biasing integrated circuit |
| 06/01/2004 | US6744657 Read only data bus and write only data bus forming in different layer metals |
| 06/01/2004 | US6744437 Data processing apparatus having DRAM incorporated therein |
| 06/01/2004 | US6744298 Semiconductor device |
| 06/01/2004 | US6744279 Data register with integrated signal level conversion |
| 06/01/2004 | US6744273 Semiconductor device capable of reducing noise to signal line |
| 05/27/2004 | WO2004044919A1 Storage circuit having single-ended write circuitry |
| 05/27/2004 | WO2004044757A2 Method and apparatus for data acquisition |
| 05/27/2004 | WO2004044754A2 Interleaved mirrored memory systems |
| 05/27/2004 | US20040103359 Dynamic real time generation of 3GPP turbo decoder interleaver sequence |
| 05/27/2004 | US20040103266 Programmable processor and method for partitioned group shift |
| 05/27/2004 | US20040103258 Dynamic optimization of latency and bandwidth on DRAM interfaces |
| 05/27/2004 | US20040103255 Memory sub-array selection monitoring |
| 05/27/2004 | US20040103243 Apparatus and methods for dedicated command port in memory controllers |
| 05/27/2004 | US20040103240 Memory device and recording and/or reproducing apparatus using the same |
| 05/27/2004 | US20040100856 Semiconductor memory device adaptive for use circumstance |
| 05/27/2004 | US20040100851 DRAM-based separate I/O memory solution for communication applications |
| 05/27/2004 | US20040100846 Method and apparatus for establishing a reference voltage in a memory |
| 05/27/2004 | US20040100844 Differential charge transfer sense amplifier |
| 05/27/2004 | US20040100843 Semiconductor memory device for reducing noise in operation of sense amplifier |
| 05/27/2004 | US20040100842 Semiconductor memory device reducing noise |
| 05/27/2004 | US20040100839 Circuits and methods for generating high frequency extended test pattern data from low frequency test pattern data input to an integrated circuit memory device |
| 05/27/2004 | US20040100838 Buffer circuit device supplying a common mode voltage applicable to a next-stage circuit receiving output signals of the buffer circuit device |
| 05/27/2004 | US20040100837 On-die termination circuit and method for reducing on-chip DC current, and memory system including memory device having the same |
| 05/27/2004 | US20040100835 Magnetic memory cell and magnetic random access memory using the same |
| 05/27/2004 | US20040100832 Magnetic memory device |
| 05/27/2004 | US20040100831 Integrated circuit and method for selecting a set of memory-cell-layer-dependent or temperature-dependent operating conditions |
| 05/27/2004 | US20040100829 Circuit for lines with multiple drivers |
| 05/27/2004 | US20040100828 Stacked memory device having shared bitlines and method of making the same |
| 05/27/2004 | US20040100827 Multibank memory on a die |
| 05/27/2004 | US20040100824 Cascode amplifier circuit for producing a fast, stable and accurate bit line voltage |
| 05/27/2004 | US20040100823 Mode selection in a flash memory device |
| 05/27/2004 | US20040100815 SRAM bit-line reduction |
| 05/27/2004 | US20040100814 Common bit/common source line high density 1T1R R-RAM array |
| 05/27/2004 | US20040100577 Memory video data storage structure optimized for small 2-D data transfer |
| 05/27/2004 | US20040100336 Ring oscillator circuit for edram/dram performance monitoring |
| 05/27/2004 | DE69333263T2 Nichtflüchtiger Halbleiterspeicher mit elektrisch und gemeinsam löschbaren Eigenschaften A non-volatile semiconductor memory having electrically and collectively erasable characteristics |
| 05/27/2004 | DE4345252B4 Audio signal recording using semiconductor memory |
| 05/27/2004 | DE10350865A1 Speicherbaustein mit variabel verzögerter Spaltenauswahl Memory module with variable delayed column selection |
| 05/27/2004 | DE10349949A1 Integrated memory circuit permits read and write operations during single clock cycle, using data transfer controller |
| 05/27/2004 | DE10230168B4 Pegelumsetz-Einrichtung Pegelumsetz device |
| 05/26/2004 | EP1422722A1 Synchronous semiconductor storage device module and its control method, information device |
| 05/26/2004 | EP1422718A2 Memory circuit apparatus |
| 05/26/2004 | EP1421775A2 In vivo imaging device with a small cross sectional area and methods for construction thereof |
| 05/26/2004 | CN1500249A Memory device and recording/reproducing appts. using same |
| 05/26/2004 | CN1499639A Semiconductor memory with effectively designed inner wiring |
| 05/26/2004 | CN1499528A Semiconductor memory |
| 05/26/2004 | CN1499525A Semiconductor memory having data access time lowered |
| 05/26/2004 | CN1499524A Semiconductor memory able to process at high speed |
| 05/26/2004 | CN1499516A Semiconductor memory having enhanced testing power |
| 05/25/2004 | US6741522 Methods and structure for using a higher frequency clock to shorten a master delay line |
| 05/25/2004 | US6741521 Semiconductor memory device with increased data reading speed |
| 05/25/2004 | US6741520 Integrated data input sorting and timing circuit for double data rate (DDR) dynamic random access memory (DRAM) devices |
| 05/25/2004 | US6741518 Semiconductor integrated circuit device and data writing method therefor |
| 05/25/2004 | US6741514 Semiconductor memory device and method of controlling the same |
| 05/25/2004 | US6741513 Data memory with a plurality of memory banks |
| 05/25/2004 | US6741508 Sense amplifier driver circuits configured to track changes in memory cell pass transistor characteristics |
| 05/25/2004 | US6741507 Semiconductor device outputting data at a timing with reduced jitter |
| 05/25/2004 | US6741506 Reduced power bit line selection in memory circuits |
| 05/25/2004 | US6741505 Semiconductor memory device with improved operation margin and increasing operation speed regardless of variations in semiconductor manufacturing processes |
| 05/25/2004 | US6741499 Non-volatile semiconductor memory device |
| 05/25/2004 | US6741497 Flash memory with RDRAM interface |
| 05/25/2004 | US6741494 Magnetoelectronic memory element with inductively coupled write wires |
| 05/25/2004 | US6741493 Split local and continuous bitline requiring fewer wires |
| 05/25/2004 | US6741491 Integrated dynamic memory, and method for operating the integrated dynamic memory |
| 05/25/2004 | US6741490 Sensing method and apparatus for resistance memory device |
| 05/25/2004 | US6741486 Semiconductor memory device and memory system |
| 05/25/2004 | US6741136 Circuit for preventing system malfunction in semiconductor memory and method thereof |
| 05/25/2004 | US6741104 DRAM sense amplifier for low voltages |
| 05/25/2004 | US6739515 Low-cost write protect tab for a non-volatile memory device |
| 05/21/2004 | WO2004042917A2 Sense amplifier thermal correction scheme |
| 05/21/2004 | WO2004042821A1 Semiconductor memory |
| 05/21/2004 | WO2004042549A1 Method for identification of spi compatible serial memory devices |
| 05/21/2004 | WO2004042506A2 Methods and apparatus for improved memory access |
| 05/21/2004 | WO2004006103A9 Method and system for improving access latency of multiple bank devices |
| 05/21/2004 | WO2003102792A9 Direct memory access circuit with atm support |
| 05/21/2004 | CA2503812A1 Method for identification of spi compatible serial memory devices |
| 05/20/2004 | US20040098567 System and software for catenated group shift instruction |
| 05/20/2004 | US20040098551 Data output circuit and method in DDR synchronous semiconductor device |
| 05/20/2004 | US20040098545 Transferring data in selectable transfer modes |
| 05/20/2004 | US20040098517 System and method for serial-to-parallel and/or parallel-to-serial data conversion |
| 05/20/2004 | US20040098397 Memory device and recording/reproducing apparatus using the same |
| 05/20/2004 | US20040095839 System and method for sensing data stored in a resistive memory element using one bit of a digital count |
| 05/20/2004 | US20040095838 Controlling data strobe output |
| 05/20/2004 | US20040095835 Circuits and methods for changing page length in a semiconductor memory device |
| 05/20/2004 | US20040095833 Error correction apparatus, systems, and methods |