Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
01/2004
01/01/2004US20040001378 Methods and apparatus for memory sensing
01/01/2004US20040001365 Apparatus for processing data, memory bank used therefor, semiconductor device, and method for reading out pixel data
01/01/2004US20040001364 System and method for a self-calibrating sense-amplifier strobe
01/01/2004US20040001361 Balanced load memory and method of operation
01/01/2004US20040001349 Early read after write operation memory device, system and method
12/2003
12/31/2003WO2004001972A1 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
12/31/2003WO2004001762A1 Semiconductor memory
12/31/2003WO2004001761A1 Semiconductor memory
12/31/2003WO2004001568A2 Single pin multilevel integrated circuit test interface
12/31/2003WO2003030176A3 Memory array employing integral isolation transistors
12/31/2003WO2002054405A3 Memory architecture with controllable bitline lengths
12/31/2003WO2001050228A3 Low latency multi-level communication interface
12/31/2003CN1465095A High-speed low-power semiconductor memory architecture
12/31/2003CN1465072A Steering gate and bit line segmentation in non-volatile memories
12/31/2003CN1464510A Read-only storage with lowered loading value
12/31/2003CN1133170C Latching type read amplifier circuit
12/31/2003CN1133167C MPEG portable sound reproducing system and reproducing method thereof
12/30/2003US6671788 Synchronous semiconductor memory device having a burst mode for improving efficiency of using the data bus
12/30/2003US6671787 Semiconductor memory device and method of controlling the same
12/30/2003US6671220 Semiconductor device having simplified internal data transfer
12/30/2003US6671219 Storage, storage method, and data processing system
12/30/2003US6671217 Semiconductor device using high-speed sense amplifier
12/30/2003US6671216 Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation
12/30/2003US6671212 Method and apparatus for data inversion in memory device
12/30/2003US6671211 Data strobe gating for source synchronous communications interface
12/30/2003US6671210 Three-transistor pipelined dynamic random access memory
12/30/2003US6671206 High voltage low power sensing device for flash memory
12/30/2003US6671204 Nonvolatile memory device with page buffer having dual registers and methods of using the same
12/30/2003US6671202 Programmable circuit structures with reduced susceptibility to single event upsets
12/30/2003US6671201 Method for writing data into a semiconductor memory device and semiconductor memory therefor
12/25/2003US20030236641 Method and system of calibrating the control delay time
12/25/2003US20030235107 Memory systems and methods of operating the same in which an active termination value for a memory device is determined at a low clock frequency and commands are applied to the memory device at a higher clock frequency
12/25/2003US20030235106 Delay locked loop control circuit
12/25/2003US20030235105 Semiconductor integrated circuit
12/25/2003US20030235104 Standby current reduction circuit applied in DRAM
12/25/2003US20030235103 Circuit, system and method for selectively turning off internal clock drivers
12/25/2003US20030235102 Memory device with sense amp equilibration circuit
12/25/2003US20030235101 Semiconductor integrated circuit device
12/25/2003US20030235093 Semiconductor memory device
12/25/2003US20030235089 Memory array with diagonal bitlines
12/25/2003US20030234673 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
12/25/2003US20030234664 Data bus
12/25/2003US20030234661 Semiconductor device and test method for the same
12/25/2003US20030234413 FeRAM semiconductor memory
12/25/2003US20030234406 Semiconductor device having standby mode and active mode
12/24/2003WO2003107349A2 Methods and apparatus for delay circuit
12/24/2003DE20316603U1 Memory device with increased storage capacity, e.g. for memory card, has data compression module for compressing data to be stored in solid-state memory medium via flash-controller interface
12/24/2003DE20313004U1 Vielfunktions-Kartenlese-/-schreibgerät Multi-function card reader - / - writing tool
12/24/2003CN2594871Y Digital picture and assay device with movable memory
12/24/2003CN1463443A Propagation delay independent SDRAM data capture device and method
12/24/2003CN1463036A Chip of memory, chip-on-chip device of using same and its mfg. method
12/24/2003CN1132190C Output circuit of semiconductor memory device
12/24/2003CN1132189C Synchronous semiconductor memory device in which burst counter is commonly employed for data writing and for data reading
12/24/2003CN1132188C Semiconductor memory device having plurality of banks
12/23/2003US6668031 Synchronized data capturing circuits using reduced voltage levels and methods therefor
12/23/2003US6667927 Refresh initiated precharge technique for dynamic random access memory arrays using look-ahead refresh
12/23/2003US6667926 Memory read/write arbitration method
12/23/2003US6667925 Semiconductor device having temperature detecting function, testing method, and refresh control method of semiconductor storage device having temperature detecting function
12/23/2003US6667924 Circuit and method for multiple match detection in content addressable memories
12/23/2003US6667923 RAM data array configured to provide data-independent, write cycle coherent current drain
12/23/2003US6667922 Sensing amplifier with single sided writeback
12/23/2003US6667921 Bitline precharge circuit and method in semiconductor memory device
12/23/2003US6667920 Scratchpad memory
12/23/2003US6667913 Semiconductor memory device
12/23/2003US6667912 Timing scheme for semiconductor memory devices
12/23/2003US6667911 High speed memory architecture
12/23/2003US6667744 High speed video frame buffer
12/23/2003US6667655 Direct-timed sneak current cancellation
12/18/2003WO2003105157A1 Semiconductor memory device with test mode to monitor internal timing control signals at 1/0
12/18/2003WO2003105155A1 Method and apparatus for improving the read access time in a non-volatile memory system
12/18/2003WO2003079662A3 System and method for translation of sdram and ddr signals
12/18/2003WO2003069484A3 Method and apparatus for supplementary command bus in a computer system
12/18/2003WO2003049118A9 Method and architecture for refreshing a 1t memory proportional to temperature
12/18/2003WO2002077787A3 Method, apparatus, and system to enhance an interface of a flash memory device
12/18/2003WO2002073619A9 System latency levelization for read data
12/18/2003WO2002071407A3 Asynchronous, high-bandwidth memory component using calibrated timing elements
12/18/2003US20030233517 Circuit for looping serial bit streams from parallel memory
12/18/2003US20030231543 Memory system and control method for the same
12/18/2003US20030231541 Regulating voltages in semiconductor devices
12/18/2003US20030231539 Control clocks generator and method thereof for a high speed sense amplifier
12/18/2003US20030231538 Static ram with flash-clear function
12/18/2003US20030231537 Single-clock, strobeless signaling system
12/18/2003US20030231536 Objective lens and optical pickup apparatus, information recording/reproducing apparatus
12/18/2003US20030231529 Drive failure recovery via capacity reconfiguration
12/18/2003US20030231527 Semiconductor memory device capable of generating internal data read timing precisely
12/18/2003US20030231525 Semiconductor memory device having a reference cell
12/18/2003US20030231523 Semiconductor device with programmable impedance control circuit
12/18/2003US20030231042 Methods and apparatus for delay circuit
12/17/2003EP1372156A2 Data output driver and data output method for minimizing data output time variations caused by data patterns
12/17/2003EP1370938A2 System and method of discovering information
12/17/2003EP1158526B1 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
12/17/2003CN1462074A Semiconductor storage device
12/17/2003CN1462037A Method of reducing effect of electrical leckage current against dynamic circuit element
12/17/2003CN1131524C Switchable multi-bit semiconductor memory device
12/17/2003CN1131523C Memory cicuit and method for current limiting during block writes in memory circuit
12/16/2003US6665782 Method and apparatus for preventing unauthorized access of memory devices
12/16/2003US6665232 Synchronous mirror delay with reduced delay line taps
12/16/2003US6665231 Semiconductor device having pipelined dynamic memory
12/16/2003US6665230 Programmable delay compensation circuit
12/16/2003US6665226 Semiconductor integrated circuit device and method of manufacturing thereof