Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
02/2004
02/26/2004US20040037114 Preconditioning global bitlines
02/26/2004US20040037113 Non-volatile semiconductor memory device having an increased access speed while maintaining the production yield
02/26/2004US20040036643 Digital pixel sensor with a dynamic comparator having reduced threshold voltage sensitivity
02/26/2004US20040036515 Method and circuit for adjusting the timing of output data based on an operational mode of output drivers
02/26/2004US20040036508 Amplifier for reading storage cells with exclusive-or type function
02/26/2004US20040036153 Stress balanced semiconductor packages, method of fabrication and modified mold segment
02/26/2004US20040035920 Recording medium, and recording apparatus, reproducing apparatus, recording method and control method thereof
02/26/2004DE10337542A1 Bitleitungs-Vorladeschaltung für ein Halbleiterspeicherbauelement Bit line precharge circuit for a semiconductor memory device
02/26/2004DE10336709A1 Kassette und Aufzeichnungsvorrichtung Cartridge and recording apparatus
02/26/2004DE10310784A1 Vielfunktion-Speicherkarte Much function memory card
02/26/2004DE10310539A1 Halbleiterspeichervorrichtung, die stabil betrieben werden kann A semiconductor memory device which can be operated stably
02/26/2004DE10310538A1 Halbleiterspeichervorrichtung mit verringerter Dauer des Tests des Speicherzellen-Datenschreibens oder -Datenlesens oder des Tests der Leseverstärkerleistung A semiconductor memory device with a reduced duration of the test of the memory cell or data writing -Datenlesens or the test, the sense amplifier power
02/26/2004DE10217870B4 Nichtflüchtiger Speicher und Verfahren zum Auslesen desselben Of the same non-volatile memory and method for reading
02/26/2004DE10215546B4 Schaltungsanordnung zur Umsetzung von Logiksignalpegeln Circuit arrangement for the implementation of logic signal levels
02/25/2004CN2604733Y Portable re-recording apparatus
02/25/2004CN1478282A Method and apparatus for built-in self-repair of memoey storage arrays
02/25/2004CN1477643A Nonvolatile storage for carrying out consistency comparision action
02/25/2004CN1477640A Fetch circuit, reference circuit and semiconductor storage device
02/25/2004CN1139936C Information recording control method and device, information recording device with said control function
02/24/2004US6697992 Data storing method of dynamic RAM and semiconductor memory device
02/24/2004US6697926 Method and apparatus for determining actual write latency and accurately aligning the start of data capture with the arrival of data at a memory device
02/24/2004US6697908 Processor system using synchronous dynamic memory
02/24/2004US6697907 Hardware initialization of a synchronous memory
02/24/2004US6697297 Apparatus for setting write latency
02/24/2004US6697296 Clock synchronous semiconductor memory device
02/24/2004US6697295 Memory device having a programmable register
02/24/2004US6697293 Localized direct sense architecture
02/24/2004US6697292 Semiconductor memory device capable of changing the selection order of sense amplifiers
02/24/2004US6697288 Bit line voltage regulation circuit
02/24/2004US6697285 Semiconductor memory device
02/24/2004US6697283 Temperature and voltage compensated reference current generator
02/24/2004US6696862 Semiconductor memory device input circuit
02/24/2004US6696748 Stress balanced semiconductor packages, method of fabrication and modified mold segment
02/24/2004US6696339 Dual-damascene bit line structures for microelectronic devices and methods of fabricating microelectronic devices
02/24/2004US6696330 Methods, structures, and circuits for transistors with gate-to-body capacitive coupling
02/24/2004US6695477 Audio signal reproducing apparatus
02/19/2004WO2004015863A2 Active pulsed scheme for driving long interconnects
02/19/2004WO2004015713A1 Method and apparatus for reading an integrated circuit memory
02/19/2004WO2004015712A1 Mp3 walkman with a replaceable hard disk
02/19/2004WO2004015711A2 Low leakage asymmetric sram cell devices
02/19/2004WO2002101748A3 Sense amplifier and architecture for open digit arrays
02/19/2004US20040032790 Semiconductor memory device with efficient buffer control for data buses
02/19/2004US20040032781 Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs
02/19/2004US20040032780 System and method for generating a clock signal in a communication system
02/19/2004US20040032777 Magnetic memory which compares first memory cell data bits and second data bits
02/19/2004US20040032776 Semiconductor memory device comprising circuit for precharging data line
02/19/2004US20040032773 Programmable memory address and decode circuits with vertical body transistors
02/19/2004US20040032767 Semiconductor storage apparatus and writing method in semiconductor storage apparatus
02/19/2004US20040032766 Semiconductor memory devices with data line redundancy schemes and method therefore
02/19/2004US20040032760 Dual loop sensing scheme for resistive memory elements
02/19/2004US20040032352 Circuit configuration for the bit-parallel outputting of a data word
02/19/2004US20040032319 Devices and methods for controlling active termination resistors in a memory system
02/19/2004US20040032002 Active pulsed scheme for driving long interconnects
02/19/2004DE10235453A1 Output driver for semiconducting memory has drive stage with output signal for high/low output level with higher/lower potential than positive/negative supply potential of second voltage supply
02/19/2004DE10233910A1 Circuit for reading programmable connection has switch for connecting address input to volatile cell input, control circuit coupled to connection programming arrangement to provide activation signal
02/19/2004DE10233878A1 Integrierter synchroner Speicher sowie Speicheranordnung mit einem Speichermodul mit wenigstens einem synchronen Speicher Integrated synchronous memory and memory device having a memory module having at least one synchronous memory
02/19/2004DE10231954A1 Dynamic RAM component for receiving an external cycle with a clock pulsed period duration has a device to make available information representing the clock pulsed period duration
02/19/2004DE10201179B4 Digitale Speicherschaltung mit mehreren Speicherbänken Digital memory circuit having a plurality of memory banks
02/19/2004CA2495316A1 Low leakage asymmetric sram cell devices
02/18/2004EP1389779A2 Recording apparatus for digital signals
02/18/2004EP1389528A1 Cartridge and recording apparatus
02/18/2004EP1389335A1 Device and method for using complementary bits in a memory array
02/18/2004EP0768676B1 A semiconductor memory with sequential clocked access codes for test mode entry
02/18/2004CN1476020A Dynamic random access memory and method used for single level readout
02/18/2004CN1476018A Data output circuit used for synchronous integrated circuit storage device
02/18/2004CN1476017A Rapid memory for loading transistor read out data using grid mutual coupling driving
02/18/2004CN1475922A Asynchronous storage using source synchronous transmission and system using same
02/18/2004CN1139075C Semiconductor read only memory and method for reading data stored in the same
02/18/2004CN1139016C Clock latency compensation circuit for DDR timing
02/17/2004US6694490 DIMM and method for producing a DIMM
02/17/2004US6694416 Double data rate scheme for data output
02/17/2004US6693844 Sending signal through integrated circuit during setup time
02/17/2004US6693842 Semiconductor device having a plurality of output signals
02/17/2004US6693841 Read compression in a memory
02/17/2004US6693836 Memory device and method having data path with multiple prefetch I/O configurations
02/17/2004US6693835 TRCD margin
02/17/2004US6693818 Semiconductor storage apparatus
02/17/2004US6693472 Method and circuit for adjusting the timing of output data based on an operational mode of output drivers
02/17/2004US6693309 Mask ROM and method for manufacturing the same
02/12/2004WO2004013909A1 Semiconductor integrated circuit incorporating memory
02/12/2004WO2003096032A3 Current source evaluation sense-amplifier
02/12/2004WO2003090231A3 Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
02/12/2004WO2003079662A9 System and method for translation of sdram and ddr signals
02/12/2004WO2003049119A3 Cascode sense amp and column select circuit and method of operation
02/12/2004WO2002091190A3 Memory with a bit line block and/or a word line block for preventing reverse engineering
02/12/2004US20040030972 Semiconductor memory device having time reduced in testing of memory cell data reading or writing, or testing of sense amplifier performance
02/12/2004US20040030945 Method and apparatus for using internal parasitic delays for adjusting setup and hold times in a memory device
02/12/2004US20040030818 Multi-functional mini-memory card suitable for SFMI and USB interfaces
02/12/2004US20040028053 Direct memory access circuit with ATM support
02/12/2004US20040027910 Method of generating initializing signal in semiconductor memory device
02/12/2004US20040027909 Self-synchronous FIFO memory device
02/12/2004US20040027908 Nonvolatile memory device suitable for cache memory
02/12/2004US20040027906 Semiconductor memory device capable of stable operation
02/12/2004US20040027904 Reading circuit and semiconductor memory device including the same
02/12/2004US20040027903 Control method of semiconductor memory device and semiconductor memory device
02/12/2004US20040027902 Semiconductor device with reduced current consumption in standby state
02/12/2004US20040027900 Semiconductor memory device and system outputting refresh flag
02/12/2004US20040027897 Bit line pre-charge circuit of semiconductor memory device
02/12/2004US20040027896 Semiconductor memory device
02/12/2004US20040027895 Semiconductor memory device and method for testing semiconductor memory device