| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 06/23/2004 | EP1431981A2 Semiconductor device comprising transition detecting circuit and method of activating the same |
| 06/23/2004 | EP1430483A1 Device for playing back mp3 files |
| 06/23/2004 | EP1430482A2 Segmented metal bitlines |
| 06/23/2004 | EP1212754B1 Electric/electronic circuit device |
| 06/23/2004 | CN1507631A Method and apparatus for biasing selected and unselected array lines when writing a memory array |
| 06/23/2004 | CN1507629A System latency levelization for read data |
| 06/23/2004 | CN1507058A Semiconductor memory device with adjustable input/output band width |
| 06/23/2004 | CN1507053A 半导体集成电路器件 The semiconductor integrated circuit device |
| 06/23/2004 | CN1507051A Method of capable of reading-white-writing data and integrated circuit |
| 06/23/2004 | CN1506975A Memory device having page buffer with double-register |
| 06/23/2004 | CN1506974A Flash memory with flexible sectioning |
| 06/23/2004 | CN1506842A Bidirectional loop layout storing system, loop layout storing system memory device and memory module |
| 06/23/2004 | CN1155093C Semiconductor storage device possessing redundancy function |
| 06/23/2004 | CN1155004C Semiconductor memory device |
| 06/23/2004 | CN1155003C Terminal apparatus and recording method |
| 06/22/2004 | US6754858 SDRAM address error detection method and apparatus |
| 06/22/2004 | US6754777 FIFO memory devices and methods of operating FIFO memory devices having multi-port cache memory devices therein |
| 06/22/2004 | US6754619 Digital recording and playback system with voice recognition capability for concurrent text generation |
| 06/22/2004 | US6754548 Reproducing device having reproducing limiting function, apparatus for rewriting reproducing limitation information, reproducing limiting method, method of rewriting reproducing limitation information and program storage medium |
| 06/22/2004 | US6754135 Reduced latency wide-I/O burst architecture |
| 06/22/2004 | US6754134 Semiconductor storage device having multiple interrupt feature for continuous burst read and write operation |
| 06/22/2004 | US6754133 Semiconductor device |
| 06/22/2004 | US6754132 Devices and methods for controlling active termination resistors in a memory system |
| 06/22/2004 | US6754130 Memory having multiple write ports and write insert unit, and method of operation |
| 06/22/2004 | US6754129 Memory module with integrated bus termination |
| 06/22/2004 | US6754127 Semiconductor integrated circuit device having internal synchronizing circuit responsive to test mode signal |
| 06/22/2004 | US6754123 Sensing circuit for determining logic state of memory cell in resistive memory array in which each memory cell has current control isolation, logic state being determined relative to reference cell having pre-selected logic state |
| 06/22/2004 | US6754122 Semiconductor memory device having overdriven bit-line sense amplifiers |
| 06/22/2004 | US6754121 Sense amplifying circuit and method |
| 06/22/2004 | US6754120 DRAM output circuitry supporting sequential data capture to reduce core access times |
| 06/22/2004 | US6754119 Sense amplifier for memory device |
| 06/22/2004 | US6754118 Method for writing to multiple banks of a memory device |
| 06/22/2004 | US6754114 Semiconductor device having redundancy circuit |
| 06/22/2004 | US6754112 Integrated circuit devices having delay circuits for controlling setup/delay times of data signals that are provided to memory devices |
| 06/22/2004 | US6754110 Evaluation circuit for a DRAM |
| 06/22/2004 | US6754107 Single supply voltage, nonvolatile phase change memory device with cascoded column selection and simultaneous word read/write operations |
| 06/22/2004 | US6754102 Method for programming a three-dimensional memory array incorporating serial chain diode stack |
| 06/22/2004 | US6753882 Wrist audio player system and wrist audio player device |
| 06/22/2004 | US6753715 System for symmetric pulse generator flip-flop |
| 06/22/2004 | US6753701 Data-sampling strobe signal generator and input buffer using the same |
| 06/17/2004 | WO2004051864A2 Dynamic real time generation of 3gpp turbo decoder interleaver sequence |
| 06/17/2004 | WO2004051663A1 Improved pre-charge method for reading a non-volatile memory cell |
| 06/17/2004 | WO2004051662A2 Apparatus and method for a current limiting bleeder device shared by columns of different memory arrays |
| 06/17/2004 | WO2004051492A1 Storage device for compressing the same input value |
| 06/17/2004 | WO2004051490A2 Memory system comprising a plurality of memory controllers and method for synchronizing the same |
| 06/17/2004 | WO2003032160A3 Circuit architecture protected against perturbations |
| 06/17/2004 | US20040117723 Error correction scheme for memory |
| 06/17/2004 | US20040117695 Capacity indicating means and measuring method |
| 06/17/2004 | US20040117569 Memory system having two-way ring topology and memory device and memory module for ring-topology memory system |
| 06/17/2004 | US20040117543 Double data rate scheme for data output |
| 06/17/2004 | US20040115879 Pseudo bidimensional randomly accessible memory |
| 06/17/2004 | US20040114454 Memory device and method for operating same |
| 06/17/2004 | US20040114453 Semiconductor memory device inputting/outputting data synchronously with clock signal |
| 06/17/2004 | US20040114451 Semiconductor integrated circuit and data processing system |
| 06/17/2004 | US20040114448 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency |
| 06/17/2004 | US20040114442 Semiconductor memory |
| 06/17/2004 | US20040114441 Semiconductor memory device with adjustable I/O bandwidth |
| 06/17/2004 | US20040114440 Data coherent logic for an sram device |
| 06/17/2004 | US20040114434 Nonvolatile memory system, semiconductor memory, and writing method |
| 06/17/2004 | US20040114423 4-bit prefetch-type FCRAM having improved data write control circuit in memory cell array and method of masking data using the 4-bit prefetch-type FCRAM |
| 06/17/2004 | US20040114421 DRAM Circuit and its Operation Method |
| 06/17/2004 | US20040114420 System and method for effectively implementing a high-speed DRAM device |
| 06/17/2004 | US20040114417 Ferroelectric memory device comprising extended memory unit |
| 06/17/2004 | US20040114412 Method and system for intelligent bi-direction signal net with dynamically configurable input/output cell |
| 06/17/2004 | US20040113676 Input buffer |
| 06/17/2004 | US20040113675 Circuit and method for regenerating reset and clock signals and high-speed digital system incorporating the same |
| 06/17/2004 | DE10354535A1 On-die termination circuit for synchronous memory device e.g. dynamic RAM, has termination enable signal generating circuit to generate termination enable signal in response to signal output from mode register set |
| 06/17/2004 | DE10354523A1 Semiconductor memory device for electronic equipment, has memory cell array divided into blocks and control circuit selectively controlling wordline control circuit to activate wordlines with same row address to change page length |
| 06/17/2004 | DE10335097A1 Speicherunterarrayauswahlüberwachung Memory subarray selection monitoring |
| 06/17/2004 | DE10255834A1 Integrated semiconducting memory has read amplifier(s), pair(s) of bit lines with n segment bit line pairs for separate electrical connection to read amplifier; n is natural number greater than 1 |
| 06/17/2004 | DE10255542A1 Memory circuit arrangement for use with a Harvard-architecture microcomputer circuit has an EPROM within a program storage area that is connected to the microcomputer circuit to permits its reprogramming |
| 06/17/2004 | DE10255541A1 Memory arrangement for a microcomputer circuit with a Harvard-architecture, has four memory units that are used during software upgrading to prevent software corruption in the event or a power loss or other system interruption |
| 06/17/2004 | DE10253918A1 Speichersystem, insbesondere für Netzwerk-Broadcasting-Anwendungen wie Video-/Audio-Anwendungen, sowie Verfahren zum Betrieb eines Speichersystems Storage system, in particular for network broadcasting applications such as video / audio applications, and to methods of operating a memory system |
| 06/17/2004 | CA2508655A1 Memory system comprising a plurality of memory controllers and method for synchronizing the same |
| 06/16/2004 | EP1429340A2 Memory system having two-way ring topology and memory device and memory module for ring topology memory system |
| 06/16/2004 | EP1428225A2 Concept for reliable data transmission between electronic modules |
| 06/16/2004 | EP1428223A2 Smart memory |
| 06/16/2004 | EP1428220A2 Dynamic column block selection |
| 06/16/2004 | EP1428167A2 Multilayer combined liquid crystal optical memory systems with means for recording and reading information |
| 06/16/2004 | EP1204975B1 Multiple data rate memory |
| 06/16/2004 | EP1158534B1 Semiconductor memory device |
| 06/16/2004 | EP1055165A4 Integrated dram with high speed interleaving |
| 06/16/2004 | CN1505048A Precharge time modified semiconductor storage apparatus |
| 06/16/2004 | CN1505047A Semiconductor storage apparatus |
| 06/16/2004 | CN1505044A Ferroelectric memory device comprising extended memory unit |
| 06/16/2004 | CN1505038A Storage apparatus capable of prolixity displacement and high-speed reading-out |
| 06/16/2004 | CN1504900A Method and system for reading data from a memory |
| 06/16/2004 | CN1504897A Internal memory module and method for operating memory module in data memory system |
| 06/16/2004 | CN1504854A Method and system for reading data from a memory |
| 06/16/2004 | CN1154114C Memory decoder with zero static power |
| 06/16/2004 | CN1154113C Current sensor amplifier |
| 06/16/2004 | CN1154112C High-speed induction amplifier with automatic shutoff precharging path |
| 06/16/2004 | CN1154111C Asynchronous pipeline semiconductor memory |
| 06/15/2004 | US6751769 (146,130) error correction code utilizing address information |
| 06/15/2004 | US6751696 Memory device having a programmable register |
| 06/15/2004 | US6751257 Video decompressing system with efficient memory access capability |
| 06/15/2004 | US6751160 Memory control with burst-access capability |
| 06/15/2004 | US6751157 Method and apparatus for completely hiding refresh operations in a DRAM device using clock division |
| 06/15/2004 | US6751156 Semiconductor memory system having dynamically delayed timing for high-speed data transfers |
| 06/15/2004 | US6751155 Non-volatile memory control |