Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
05/2004
05/20/2004US20040095830 Semiconductor device and method for driving the same
05/20/2004US20040095829 Ruggedised solid-state storage device
05/20/2004US20040095828 Non-volatile memory device achieving fast data reading by reducing data line charging period
05/20/2004US20040095827 Memory cell sensing integrator
05/20/2004US20040095826 System and method for sensing memory cells of an array of memory cells
05/20/2004US20040095825 Nonvolatile memory device with sense amplifier securing reading margin
05/20/2004US20040095824 Semiconductor memory device
05/20/2004US20040095822 Circuit and method for voltage regulation in a semiconductor device
05/20/2004US20040095818 Memory controller and data processing system
05/20/2004US20040095816 Memory device and method having data path with multiple prefetch I/O configurations
05/20/2004US20040095813 Semiconductor integrated circuit device and method of manufacturing the same
05/20/2004US20040095810 Automatic reference voltage regulation in a memory device
05/20/2004US20040095800 Method and system for controlling an sram sense amplifier clock
05/20/2004US20040095795 Method to prevent bit line capacitive coupling
05/20/2004US20040095178 Pipe latch circuit for outputting data with high speed
05/20/2004US20040095171 Reset circuit and FeRAM using the same
05/20/2004US20040094844 Multichip module and multichip shutdown method
05/20/2004US20040094789 Trench buried bit line memory devices and methods thereof
05/20/2004US20040094786 Trench buried bit line memory devices and methods thereof
05/20/2004US20040094780 Semiconductor memory device with structure of converting parallel data into serial data
05/19/2004EP1420412A1 Circuit and method for temperature tracing of devices including an element of chalcogenic material, in particular phase change memory devices
05/19/2004EP1420410A2 Power-saving reading of magnetic memory devices
05/19/2004EP1420409A2 Data output circuit and method in ddr synchronous semiconductor device
05/19/2004EP1419507A2 Method and device for testing semiconductor memory devices
05/19/2004DE10338980A1 Rücksetzsignalgenerator, Halbleiterspeicherbaustein und Rücksetzverfahren Reset signal generator, the semiconductor memory device and resetting method
05/19/2004CN1497835A Emulator of transistor oscillator
05/19/2004CN1497609A Semiconductor stroage device
05/19/2004CN1497607A Circuit and method for supplying page mode operation in semiconductor storing device
05/19/2004CN1497414A Data switching circuit and semiconductor device
05/19/2004CN1150561C Burst mode type semiconductor memory device
05/19/2004CN1150558C Integraed memory with memory cells and reference cells and corresponding operating method
05/19/2004CN1150556C Recording and reproducing device
05/19/2004CN1150462C Method and apparatus for pipelining data in integrated circuit
05/19/2004CN1150448C Dictation and transcription appts
05/18/2004US6738944 Digital data recording and reproducing apparatus
05/18/2004US6738918 High speed data transfer synchronizing system and method
05/18/2004US6738880 Buffer for varying data access speed and system applying the same
05/18/2004US6738860 Synchronous DRAM with control data buffer
05/18/2004US6738309 Semiconductor memory and method for operating the semiconductor memory
05/18/2004US6738305 Standby mode circuit design for SRAM standby power reduction
05/18/2004US6738302 Optimized read data amplifier and method for operating the same in conjunction with integrated circuit devices incorporating memory arrays
05/18/2004US6738301 Method and system for accelerating coupling of digital signals
05/18/2004US6738300 Direct read of DRAM cell using high transfer ratio
05/18/2004US6738298 Automatic reference voltage regulation in a memory device
05/18/2004US6738296 Sense amplifier enable signal generating circuits having process tracking capability and semiconductor memory devices including the same
05/18/2004US6738295 Semiconductor memory device and associated data read method
05/18/2004US6738283 Method of reading stored data and semiconductor memory device
05/18/2004US6738282 Random access memory and method for controlling operations of reading, writing, and refreshing data of the same
05/18/2004US6738280 Read only memory
05/18/2004US6737925 Method and apparatus for controlling supply voltage levels for integrated circuits
05/18/2004US6737897 Power reduction for delay locked loop circuits
05/18/2004US6737895 Control signal generating device for driving a plurality of circuit units
05/18/2004US6737743 Memory chip cut out of wafer including basic chips functioning as memory chip independently from each other, dicing line interposed between and connecting basic chips, and configuring part of memory chip; each basic chip is operated independently
05/13/2004WO2004040579A1 Smart card write-only register
05/13/2004US20040090920 Semiconductor integrated circuit with full-speed data transition scheme for DDR SDRAM at internally doubled clock testing application
05/13/2004US20040090857 Semiconductor device
05/13/2004US20040090855 Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (dram) arrays and embedded dram
05/13/2004US20040090854 Apparatus for and method of controlling AIVC through block selection information in semiconductor memory device
05/13/2004US20040090852 Power-saving reading of magnetic memory devices
05/13/2004US20040090848 DIMM and method for producing a DIMM
05/13/2004US20040090846 Semiconductor memory
05/13/2004US20040090840 SRAM-compatible memory and method of driving the same
05/13/2004US20040090837 Semiconductor memory device and test method of the same
05/13/2004US20040090836 Method and apparatus for data inversion in memory device
05/13/2004US20040090833 Read-out circuit for a dynamic memory circuit, memory cell array, and method for amplifying and reading data stored in a memory cell array
05/13/2004US20040090832 Cartridge and recording apparatus
05/13/2004US20040090831 Dedicated redundancy circuits for different operations in a flash memory device and methods of operating the same
05/13/2004US20040090830 Data path reset circuit using clock enable signal, reset method, and semiconductor memory device including the data path reset circuit and adopting the reset method
05/13/2004US20040090827 Interleaved mirrored memory systems
05/13/2004US20040090826 Semiconductor device having semiconductor memory with sense amplifier
05/13/2004US20040090821 Multi-mode synchronous memory device and methods of operating and testing same
05/13/2004US20040090819 Storage circuit having single-ended write circuitry
05/13/2004US20040090817 Split local and continuous bitline requiring fewer wires
05/13/2004US20040090246 Method and apparatus for amplifying a regulated differential signal to a higher voltage
05/13/2004US20040090242 Input buffer circuit
05/13/2004US20040089913 Semiconductor memory device with efficiently laid-out internal interconnection lines
05/12/2004EP1418589A1 Method and device for timing random reading of a memory device
05/12/2004EP1418502A2 Unusable block management within a non-volatile memory system
05/12/2004EP1417685A1 Proportional to temperature voltage generator
05/12/2004CN1496568A Memory sense amplifier for semiconductor memory device
05/12/2004CN1496001A Duty ratio detection equipment whose return time is short
05/12/2004CN1495896A Storage system and data transmission method
05/12/2004CN1495799A Special-purpose redundant circuit for different operations in internal memory device and its operation method
05/12/2004CN1495798A Nonvolatile memory suitable for superhigh speed buffer memory
05/12/2004CN1495797A Semiconductor storage equipment with storage unit array which is divided into block
05/12/2004CN1495796A Semiconductor storage and its testing method
05/12/2004CN1495795A Semiconductor storage device
05/12/2004CN1495791A Semiconductor storage device
05/12/2004CN1495165A Indane or indoline derivative
05/12/2004CN1149737C Semiconductor integrated circuits
05/12/2004CN1149580C Dynamic random access stroage
05/12/2004CN1149579C Semiconductor memory device
05/12/2004CN1149577C Block write power reduction method and device
05/12/2004CN1149575C Recording and/or reproducing apparatus and recording apparatus
05/11/2004US6735726 Method of deciding error rate and semiconductor integrated circuit device
05/11/2004US6735674 Method of maintaining data coherency in late-select synchronous pipeline type semiconductor memory device and data coherency maintaining circuit therefor
05/11/2004US6735669 Rambus DRAM
05/11/2004US6735668 Process of using a DRAM with address control data
05/11/2004US6735667 Synchronous data system with control data buffer
05/11/2004US6735546 Memory device and method for temperature-based control over write and/or read operations