Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
01/2004
01/15/2004US20040007746 Electrically programmable three-dimensional memory-based self-test
01/15/2004US20040007719 Semiconductor memory apparatus
01/15/2004DE10203893B4 DDR-Speicher und Speicherverfahren DDR memory and storage procedures
01/14/2004EP1381053A2 Device and method for selecting power down exit
01/14/2004CN1468437A Method and apparatus for boosting bitlines for low vcc read
01/14/2004CN1467850A Semiconductor memory device with data bus scheme for reducing high frequency noise
01/14/2004CN1467810A Semiconductor device and test method for the same
01/14/2004CN1467747A 半导体存储器件 A semiconductor memory device
01/14/2004CN1467596A Memory systems and methods of operating the same
01/14/2004CN1134825C Secure semiconductor device
01/14/2004CN1134788C Semiconductor memory with high space-efficient MDQ switch placement
01/14/2004CN1134760C Playing apparatus and recording and playing apparatus
01/13/2004US6678817 Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engine
01/13/2004US6678813 Dynamically adaptive buffer mechanism
01/13/2004US6678205 Multi-mode synchronous memory device and method of operating and testing same
01/13/2004US6678204 Semiconductor memory device with high-speed operation and methods of using and designing thereof
01/13/2004US6678203 Editing apparatus, editing method, and non-volatile memory
01/13/2004US6678201 Distributed FIFO in synchronous memory
01/13/2004US6678199 Memory device with sense amp equilibration circuit
01/13/2004US6678198 Pseudo differential sensing method and apparatus for DRAM cell
01/13/2004US6678197 Systems and methods for reducing the effect of noise while reading data from memory
01/13/2004US6678194 Sense amplifier arrangement for semiconductor memory device
01/13/2004US6678193 Apparatus and method for tracking between data and echo clock
01/13/2004US6678191 Semiconductor memory device having memory cell arrays capable of accomplishing random access
01/13/2004US6678186 Row decoded biasing of sense amplifier for improved one's margin
01/13/2004US6677813 Integrated circuit for receiving a clock signal, particularly for a semiconductor memory circuit
01/13/2004US6677794 Clock synchronization device
01/13/2004US6677791 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory
01/13/2004US6677631 MRAM memory elements and method for manufacture of MRAM memory elements
01/08/2004WO2004003925A2 Sense amplifier for a memory having at least two distinct resistance states
01/08/2004WO2004003920A1 Self-calibrating sense amplifier strobe
01/08/2004WO2004003919A1 Balanced load memory and method of operation
01/08/2004WO2004003918A1 Three input sense amplifier and method of operation
01/08/2004WO2004003700A2 An early read after write operation memory device, system and method
01/08/2004US20040006676 Method for bus capacitance reduction
01/08/2004US20040006675 Method for bus capacitance reduction
01/08/2004US20040006658 Multi-chip system having a continuous burst read mode of operation
01/08/2004US20040005052 Semiconductor device, terminal device and communication method
01/08/2004US20040004902 Semiconductor integrated circuit device
01/08/2004US20040004900 Semiconductor integrated circuit device with embedded synchronous memory precisely operating in synchronization with high speed clock
01/08/2004US20040004897 Layout structures of data input/output pads and peripheral circuits of integrated circuit memory devices
01/08/2004US20040004895 Circuit and method for selecting an operational voltage mode in a semiconductor memory device
01/08/2004US20040004893 Semiconductor memory device having output driver for high frequency operation
01/08/2004US20040004891 DRAM memory cell and memory cell array with fast read/write access
01/08/2004US20040004890 Semiconductor memory device and method of controlling the same
01/08/2004US20040004887 Volumetric data storage apparatus
01/08/2004US20040004886 Memory device and method for reading sequentially groups of bits from a memory device
01/08/2004US20040004881 Single ended output sense amplifier circuit with reduced power consumption and noise
01/08/2004US20040004877 Semiconductor storage device with signal wiring lines RMED above memory cells
01/08/2004US20040004873 On-chip compression of charge distribution data
01/08/2004US20040004870 Method for manufacturing semiconductor device
01/08/2004US20040004869 Semiconductor device
01/08/2004US20040004868 Sense amplifier
01/08/2004US20040004867 Differental current source for generating dram refresh signal
01/08/2004US20040004862 Semiconductor memory device
01/08/2004US20040004861 Differential EEPROM using pFET floating gate transistors
01/08/2004US20040004860 Column decode circuit for high density/high performance memories
01/08/2004US20040004503 Storage circuit
01/08/2004DE10321451A1 Die Verwendung eines chipinternen Temperaturerfassungsschemas zum Wärmeschutz von DRAMs The use of an on-chip temperature sensing scheme for thermal protection of DRAMs
01/08/2004DE10307244A1 Auto-precharge control circuit used in e.g. dynamic RAM, varies write recovery time of semiconductor memory device in response to control signal including clock frequency information
01/08/2004DE10226583A1 DRAM-Speicherzelle für schnellen Schreib-/Lesezugriff DRAM memory cell for fast read / write access
01/07/2004EP1378914A2 Semiconductor memory device
01/07/2004EP1378081A1 System, method, and article of manufacture for using a replaceable component to select a replaceable quality of service capable network communication channel component
01/07/2004EP1377982A1 Multiple bit prefetch output data path
01/07/2004CN1466762A Synchronous flash memory with status burst output
01/07/2004CN1466147A Control time pulse generator and control time pulse generation method for high-speed sensing amplifier
01/07/2004CN1134018C Synchronous semiconductor memory device with auto precharge operation easily controlled
01/07/2004CN1134013C Indicator circuit with small placeholder, high speed and low power dissipation
01/07/2004CN1134012C Data reading circuit for semiconductor memory device
01/06/2004USRE38379 Semiconductor memory with alternately multiplexed row and column addressing
01/06/2004US6675329 Internal memory in application specific integrated circuit device and method for testing internal memory
01/06/2004US6675324 Rendezvous of processors with OS coordination
01/06/2004US6675269 Semiconductor device with memory controller that controls page mode access
01/06/2004US6675255 Device initialize command for a synchronous memory
01/06/2004US6674686 Method and apparatus for read operation and write operation in semiconductor memory device
01/06/2004US6674685 Semiconductor memory device having write column select gate
01/06/2004US6674683 Serial access memory
01/06/2004US6674679 Adjustable current mode differential amplifier for multiple bias point sensing of MRAM having equi-potential isolation
01/06/2004US6674678 Sense amplifier control circuit of semiconductor memory device
01/06/2004US6674677 Memory device tester and method for testing reduced power states
01/06/2004US6674675 Semiconductor device with flexible redundancy system
01/06/2004US6674672 Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits
01/06/2004US6674671 Circuit for lines with multiple drivers
01/06/2004US6674668 Read circuit on nonvolatile semiconductor memory
01/06/2004US6674663 Nonvolatile storage device and operating method thereof
01/06/2004US6674442 Image memory system
01/06/2004US6674378 Predictive timing calibration for memory devices
01/06/2004US6674318 Semiconductor integrated circuit
01/06/2004US6673675 Methods of fabricating an MRAM device using chemical mechanical polishing
01/02/2004EP1376610A2 Block redundancy implementation in hierarchical RAMs
01/02/2004EP1376609A2 Efficient column redundancy techniques
01/02/2004EP1376597A2 Distributed, highly configurable modular address predecoder
01/02/2004EP1376596A2 Synchronous global controller for enhanced pipeline
01/02/2004EP1376595A2 Recording medium, and recording apparatus, reproducing apparatus, recording method and control method thereof
01/02/2004EP1374247A2 Method and apparatus for forcing idle cycles to enable refresh operations in a semiconductor memory
01/02/2004EP1374245A2 System latency levelization for read data
01/02/2004EP1374244A2 A method of synchronizing read timing in a high speed memory system
01/01/2004US20040003195 Burst transfer memory
01/01/2004US20040001383 Sense amplifier and method for performing a read operation in a MRAM
01/01/2004US20040001382 Writeback and refresh circuitry for direct sensed dram macro