Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
11/2003
11/13/2003US20030210586 Magnetic storage apparatus having dummy magnetoresistive effect element and manufacturing method thereof
11/13/2003US20030210584 Column decoder configuration for a 1T/1C memory
11/13/2003US20030210581 Low-voltage semiconductor memory device
11/13/2003US20030210580 Semiconductor, solid-state imaging device, and method for making the same
11/13/2003US20030210578 DLL driving circuit for use in semiconductor memory device
11/13/2003US20030210577 Semiconductor memory device
11/13/2003US20030210576 Programmable memory devices with latching buffer circuit and methods for operating the same
11/13/2003US20030210575 Multimode data buffer and method for controlling propagation delay time
11/13/2003US20030210574 Scratchpad memory
11/13/2003US20030210569 Semiconductor memory device and memory system
11/13/2003US20030210506 Use of DQ pins on a ram memory chip for a temperature sensing protocol
11/13/2003US20030210505 Use of an on-die temperature sensing scheme for thermal protection of DRAMS
11/13/2003US20030210079 Input/output buffer having reduced skew and methods of operation
11/13/2003US20030210078 Current source evaluation sense-amplifier
11/13/2003DE10216615C1 Verfahren und Vorrichtung zur Erzeugung einer Referenzspannung Method and apparatus for generating a reference voltage
11/12/2003EP1361661A2 Digital to analog converter, delay-locked loop, memory device and counting method
11/12/2003EP1361582A1 Electronic memory for characteristics and factors for an electronic protection circuit of a power switch
11/12/2003EP1361581A1 Power switch device comprising an electronic memory for characteristics and factors
11/12/2003EP1361517A2 Data processing method and apparatus therefore
11/12/2003EP1360590A2 Adaptive throttling of memory accesses, such as throttling rdram accesses in a real-time system
11/12/2003EP1360569A2 Timing control means for automatic compensation of timing uncertainties
11/12/2003EP0780984B1 Output circuit and electronic device using the circuit
11/12/2003CN1455415A Semiconductor storage apparatus
11/12/2003CN1455414A Resistance crosspoint storage unit array having cross-coupling latch reading amplifier
11/12/2003CN1455413A Differencial current estimation circuit of estimating memory state of static random memory semiconductor memory cell unit and reading amplifying circuit
11/12/2003CN1455412A Resistance crosspoint storage array with charge injection differential read-out amplifier
11/12/2003CN1127800C Secondary read out amplifier with window discriminator for self-timing operation
11/12/2003CN1127766C Semiconductor storage apparatus
11/12/2003CN1127680C Method and apparatus for audibly indicating when predetermined location has been encountered in stored data
11/11/2003US6647523 Method for generating expect data from a captured bit pattern, and memory device using same
11/11/2003US6647496 Semiconductor memory card
11/11/2003US6647478 Semiconductor memory device
11/11/2003US6647470 Memory device having posted write per command
11/11/2003US6646955 Synchronous dynamic random access memory
11/11/2003US6646954 Synchronous controlled, self-timed local SRAM block
11/11/2003US6646953 Single-clock, strobeless signaling system
11/11/2003US6646946 Fast accessible semiconductor memory device
11/11/2003US6646941 Apparatus for operating an integrated circuit having a sleep mode
11/11/2003US6646939 Low power type Rambus DRAM
11/11/2003US6646937 Integrated clock generator, particularly for driving a semiconductor memory with a test signal
11/11/2003US6646934 Semiconductor device
11/11/2003US6646928 Packet-based integrated circuit dynamic random access memory device incorporating an on-chip row register cache to reduce data access latencies
11/11/2003US6646920 Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics
11/11/2003US6646914 Flash memory array architecture having staggered metal lines
11/11/2003US6646912 Non-volatile memory
11/11/2003US6646908 Integrated memory chip with a dynamic memory
11/06/2003WO2003092014A1 Memory storage device with heating element
11/06/2003WO2003091883A1 Destructive-read random access memory system buffered with destructive-read memory cache
11/06/2003WO2003017280A3 Control circuit for sense amplifiers
11/06/2003WO2003007303A3 Memory device having different burst order addressing for read and write operations
11/06/2003WO2002103911A3 Method and apparatus for a clock circuit
11/06/2003US20030208669 System with control data buffer for transferring streams of data
11/06/2003US20030208663 System and method for multi-bit flash reads using dual dynamic references
11/06/2003US20030206480 Semiconductor memory device
11/06/2003US20030206479 High area efficient data line architecture
11/06/2003US20030206476 Low power consumption memory device having row-to-column short
11/06/2003US20030206471 Semiconductor memory device and method for pre-charging the same
11/06/2003US20030206469 High data rate write process for non-volatile flash memories
11/06/2003US20030206468 Apparatus and method for a memory storage cell leakage cancellation scheme
11/06/2003US20030206463 Low-power consumption semiconductor memory device
11/06/2003US20030206459 Semiconductor device array having dense memory cell array and hierarchical bit line scheme
11/06/2003US20030206457 Semiconductor device having mechanism capable of high-speed operation
11/06/2003US20030206456 Novel flash memory array structure suitable for multiple simultaneous operations
11/06/2003US20030206455 Novel flash memory array structure suitable for multiple simultaneous operations
11/06/2003US20030206450 Segmented metal bitlines
11/06/2003US20030206448 Sense amplifier enable signal generating circuits having process tracking capability and semiconductor memory devices including the same
11/06/2003US20030206438 Nonvolatile semiconductor memory device
11/06/2003US20030206427 System and method for performing partial array self-refresh operation in a semiconductor memory device
11/06/2003US20030206043 Escalator code-based DAC and delay-locked loop apparatus and corresponding methods
11/05/2003EP1359588A2 Memory architecture for increased speed and reduced power consumption
11/05/2003EP1359587A2 Memory cell arrays
11/05/2003EP1359586A2 Memory device and in particular a sense amplifier therefor
11/05/2003EP1358678A1 Programmable memory address and decode circuits with ultra thin vertical body transistors
11/05/2003EP1287528B1 Semiconductor memory and controlling method thereof
11/05/2003EP1163675B1 Integrated memory with memory cells and reference cells and operating method for a memory of this type
11/05/2003CN2585371Y Memory control chip and its control circuit
11/05/2003CN1454385A A method and apparatus for accelerating signal equalization between a pair of signal lines
11/05/2003CN1454384A A method and apparatus for simultaneous, differential data sensing and capture in a high speed memory
11/05/2003CN1453797A 半导体存储器 Semiconductor memory
11/05/2003CN1453794A Memory with two-stage read-out amplifier carrying extra load unit
11/05/2003CN1453793A Semiconductor memory with test mode and storing system using the same
11/04/2003US6643765 Programmable processor with group floating point operations
11/04/2003US6643720 Data transfer control method, and peripheral circuit, data processor and data processing system for the method
11/04/2003US6643219 Synchronous mirror delay with reduced delay line taps
11/04/2003US6643218 Precharge control signal generator, and semiconductor memory device using the same
11/04/2003US6643216 Asynchronous queuing circuit for DRAM external RAS accesses
11/04/2003US6643215 Synchronous memory devices with synchronized latency control circuits and methods of operating same
11/04/2003US6643214 Semiconductor memory device having write column select gate
11/04/2003US6643213 Write pulse circuit for a magnetic memory
11/04/2003US6643212 Simultaneous function dynamic random access memory device technique
11/04/2003US6643208 Semiconductor integrated circuit device having hierarchical power source arrangement
11/04/2003US6643204 Self-time scheme to reduce cycle time for memories
11/04/2003US6643203 Semiconductor memory device including clock-independent sense amplifier
11/04/2003US6643201 Memory device having read charge control, write charge control and floating or precharge circuits
11/04/2003US6643200 Sense amplifier having integrated y multiplexor and method therefor
11/04/2003US6643196 Redundant memory circuit for analog semiconductor memory
11/04/2003US6643194 Write data masking for higher speed drams
11/04/2003US6643193 Semiconductor device, microcomputer and flash memory
11/04/2003US6643192 Voltage and temperature compensated pulse generator
11/04/2003US6643190 Packet command driving type memory device