Patents
Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197)
12/2003
12/16/2003US6665223 Memory device and method having data path with multiple prefetch I/O configurations
12/16/2003US6665222 Synchronous dynamic random access memory device
12/16/2003US6665218 Self calibrating register for source synchronous clocking systems
12/16/2003US6665216 Apparatus and system for reading non-volatile memory with dual reference cells
12/16/2003US6665215 Memory cell read device with a precharge amplifier and associated methods
12/16/2003US6665213 Sense amplifier circuit and method for nonvolatile memory devices
12/16/2003US6665209 Semiconductor memory apparatus, semiconductor apparatus, data processing apparatus and computer system
12/16/2003US6665204 Semiconductor memory device for decreasing a coupling capacitance
12/16/2003US6665203 Semiconductor memory device having a hierarchial I/O strucuture
12/16/2003US6664850 Delay variability reduction method and apparatus
12/16/2003US6664838 Apparatus and method for generating a compensated percent-of-clock period delay signal
12/16/2003US6664807 Repeater for buffering a signal on a long data line of a programmable logic device
12/16/2003US6664587 EEPROM cell array structure with specific floating gate shape
12/11/2003WO2003102956A1 Roll back method for a smart card
12/11/2003WO2003102792A1 Direct memory access circuit with atm support
12/11/2003US20030229831 Pad connection structure of embedded memory devices and related memory testing method
12/11/2003US20030229750 Access controller that efficiently accesses synchronous semiconductor memory device
12/11/2003US20030227813 Semiconductor apparatus which prevents generating noise and being influenced by noise
12/11/2003US20030227808 Semiconductor memory device and method of controlling the same
12/11/2003US20030227806 Semiconductor memory device
12/11/2003US20030227798 Reduced power registered memory module and method
12/11/2003US20030227797 Data output driver and data output method for minimizing data output time variations caused by data patterns
12/11/2003US20030227792 Temperature compensated t-ram memory device and method
12/11/2003US20030227791 System and method to counteract voltage disturbances in open digitline array dynamic random access memory systems
12/11/2003US20030227790 Temperature compensated T-RAM memory device and method
12/11/2003US20030227308 Delay locked loop circuit with time delay quantifier and control
12/11/2003DE19655044C2 Synchronous semiconductor DRAM apparatus using e.g. 200 MHz clock signal
12/10/2003CN1461108A Semiconductor device suitable for cut-off and turn-on of power supply
12/10/2003CN1130731C Semiconductor read-only memory
12/10/2003CN1130728C Burst length discriminating circuit
12/10/2003CN1130624C Semiconductor memory device
12/09/2003US6662305 Fast re-synchronization of independent domain clocks after powerdown to enable fast system start-up
12/09/2003US6662291 Synchronous DRAM System with control data
12/09/2003US6662290 Address counter and address counting method
12/09/2003US6662278 Adaptive throttling of memory acceses, such as throttling RDRAM accesses in a real-time system
12/09/2003US6662266 Synchronous DRAM modules with multiple clock out signals
12/09/2003US6662248 Recording/reproducing apparatus using an IC memory
12/09/2003US6661736 Apparatus and method for distributing a clock signal on a large scale integrated circuit
12/09/2003US6661735 Semiconductor memory device
12/09/2003US6661732 Memory system having reduced powder data refresh
12/09/2003US6661731 Semiconductor memory, semiconductor integrated circuit and semiconductor mounted device
12/09/2003US6661726 Multiple mode elastic data transfer interface
12/09/2003US6661724 Method and system for programming a memory device
12/09/2003US6661723 Wide databus architecture
12/09/2003US6661722 Layout method for bit line sense amplifier driver
12/09/2003US6661721 Systems and methods for executing precharge commands using posted precharge in integrated circuit memory devices with memory banks each including local precharge control circuits
12/09/2003US6661717 Dynamically centered setup-time and hold-time window
12/09/2003US6661716 Write method and circuit for content addressable memory
12/09/2003US6661714 Integrated circuit memory devices having sense amplifiers therein that receive nominal and boosted supply voltages when active and methods of operating same
12/09/2003US6661696 Ferroelectric random access memory configurable output driver circuit
12/09/2003US6661688 Method and article for concentrating fields at sense layers
12/09/2003US6661272 Digitally controllable internal clock generating circuit of semiconductor memory device and method for same
12/09/2003US6661268 Charge compensation control circuit and method for use with output driver
12/09/2003US6661215 Semiconductor device with small current consumption having stably operating internal circuitry
12/09/2003US6661092 Memory module
12/09/2003US6661041 Digitline architecture for dynamic memory
12/04/2003WO2003100787A1 Efficient read, write method for pipeline memory
12/04/2003WO2003100786A2 Serially sensing the output of multilevel cell arrays
12/04/2003WO2003100549A2 Pseudo multiport data memory has stall facility
12/04/2003US20030226053 Variably controlled delay line for read data capture timing window
12/04/2003US20030225987 Software command sequence for optimized power consumption
12/04/2003US20030225984 Associative memory having a mask function for use in a network router
12/04/2003US20030223730 Multi-message audio recorder and memento
12/04/2003US20030223303 DDR-II driver impedance adjustment control algorithm and interface circuits
12/04/2003US20030223300 Integrated memory using prefetch architecture and method for operating an integrated memory
12/04/2003US20030223299 Method of forming twin-spacer gate FLASH device and the structure of the same
12/04/2003US20030223298 Efficient latch array initialization
12/04/2003US20030223293 Synchronous type semiconductor memory device
12/04/2003US20030223290 Semiconductor memory device with data bus scheme for reducing high frequency noise
12/04/2003US20030223285 Single supply voltage, nonvolatile phase change memory device with cascoded column selection and simultaneous word read/write operations
12/04/2003US20030223279 Clock driver in semiconductor memory device
12/04/2003US20030223278 Dynamically centered setup-time and hold-time window
12/04/2003US20030223277 Semiconductor memory device
12/04/2003US20030223274 Dynamic column block selection
12/04/2003US20030223271 Power detecting circuit and method for stable power-on reading of flash memory device using the same
12/04/2003US20030223267 Reduced power bit line selection in memory circuits
12/04/2003US20030223262 Semiconductor memory device
12/04/2003US20030223261 Semiconductor memory device
12/04/2003US20030223016 Image processing apparatus and image processing method
12/04/2003US20030222720 Semiconductor integrated circuit
12/04/2003US20030222676 Programmable array logic circuit whose product and input line junctions employ single bit non-volatile ferromagnetic cells
12/04/2003DE10242817C1 Dynamic random-access memory circuit has memory bank divided into regions in turn divided into segments provided with master datalines for each segment diverging from region bus
12/03/2003EP1367593A1 Semiconductor memory and method for entering its operation mode
12/03/2003EP1366495A1 High speed signal path and method
12/03/2003EP1273009B1 Current conveyor and method for readout of mtj memories
12/03/2003CN1459797A Semiconductor storage convertible into two storage unit structure
12/03/2003CN1459796A Semiconductor device for use in two systems with different power voltages
12/03/2003CN1130022C Semiconductor circuit device operating in synchronization with clock signal
12/03/2003CN1129916C Programmable access protection in flash memory device
12/03/2003CN1129915C Integrated logic circuit and EEP ROM
12/03/2003CN1129911C Synchronous type semiconductor storage
12/03/2003CN1129910C Device for generating reference electric potential and semiconductor memory apparatus equipped with same
12/03/2003CN1129909C Read out amplifier
12/02/2003US6658575 Voice recording/reproducing apparatus which enters a standby mode while in a communication mode with an external device
12/02/2003US6658544 Techniques to asynchronously operate a synchronous memory
12/02/2003US6658530 High-performance memory module
12/02/2003US6658523 System latency levelization for read data
12/02/2003US6657920 Circuit for generating internal address in semiconductor memory device
12/02/2003US6657919 Delayed locked loop implementation in a synchronous dynamic random access memory
12/02/2003US6657918 Delayed locked loop implementation in a synchronous dynamic random access memory