Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
01/2000
01/05/2000EP0969513A2 Embedded enhanced DRAM with integrated logic circuit, and associated method
01/05/2000EP0969480A1 Encoding method and memory device
01/05/2000EP0969479A1 High-bandwidth read and write architecture for non-volatile memories
01/05/2000EP0969478A1 A multilevel programming method for a nonvolatile semiconductor memory
01/05/2000EP0969477A1 Small capacitance change detection device
01/05/2000EP0969473A1 An interleaved sense amplifier with a single-sided precharge device
01/05/2000EP0867026B1 Low voltage dynamic memory
01/05/2000DE19929656A1 Non-volatile ferromagnetic memory achieves high access speed without danger of damaging a reference cell
01/05/2000DE19923259A1 Semiconductor memory in substrate of first conductivity
01/05/2000CN1240299A Assembly line double-port integrated circuit memory
01/04/2000USRE36482 Data processor and data processing system and method for accessing a dynamic type memory using an address multiplexing system
01/04/2000US6012122 Systems and methods for distinguishing between memory types
01/04/2000US6011799 Method and apparatus for managing external physical layer devices
01/04/2000US6011751 Sychronous semiconductor memory device with burst address counter operating under linear/interleave mode of single data rate/double data rate scheme
01/04/2000US6011750 Semiconductor device having address transition detecting circuit
01/04/2000US6011747 Memory cell of non-volatile semiconductor memory device
01/04/2000US6011746 Word line driver for semiconductor memories
01/04/2000US6011745 Semiconductor memory system with bank switching control
01/04/2000US6011743 Charge pump circuit for memory device
01/04/2000US6011739 Semiconductor memory
01/04/2000US6011738 Sensing circuit with charge recycling
01/04/2000US6011737 DRAM with edge sense amplifiers which are activated along with sense amplifiers internal to the array during a read cycle
01/04/2000US6011735 Synchronous semiconductor memory device with redundancy determination unit that can set replacement of redundant memory array provided in row and column directions
01/04/2000US6011729 Multilevel memory devices with multi-bit data latches
01/04/2000US6011728 Synchronous memory with read and write mode
01/04/2000US6011727 Block write circuit and method for wide data path memory devices
01/04/2000US6011726 Four device SRAM cell with single bitline
01/04/2000US6011725 Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
01/04/2000US6011716 Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
01/04/2000US6011715 Method for multilevel programming of a nonvolatile memory, and a multilevel nonvolatile memory
01/04/2000US6011714 Semiconductor circuit capable of storing a plurality of analog or multi-valued data
01/04/2000US6011713 Static random access memory including potential control means for writing data in memory cell and write method for memory cell
01/04/2000US6011711 SRAM cell with p-channel pull-up sources connected to bit lines
01/04/2000US6011709 Semiconductor memory with built-in cache
01/04/2000US6011428 Voltage supply circuit and semiconductor device including such circuit
01/04/2000US6011426 Substrate voltage generation circuit for semiconductor device
12/1999
12/30/1999DE19929926A1 Memory of multilevel quantum dot structure with conductive layers removed to form mask for source/drain
12/30/1999DE19928767A1 Semiconductor memory component with memory element (cell) matrix
12/30/1999DE19828657A1 Integrierter Speicher Built-in Memory
12/29/1999WO1999067828A1 Magnetic tunnel device, method of manufacture thereof, and magnetic head
12/29/1999WO1999067790A1 Universal memory element and method of programming same
12/29/1999WO1999067789A1 Method and apparatus for controlling the data rate of a clocking circuit
12/29/1999EP0967617A1 A floating gate transistor, multi-level cell memory device and method for programming the cells and stabilizing the programmed charge
12/29/1999EP0967616A1 Integrated memory
12/29/1999EP0966742A2 Pump control circuit
12/29/1999CN1239802A Semiconductor memory device
12/29/1999CN1047866C Self-bootstrapping device
12/28/1999US6009501 Method and apparatus for local control signal generation in a memory device
12/28/1999US6009494 Synchronous SRAMs having multiple chip select inputs and a standby chip enable input
12/28/1999US6009040 Apparatus and methods for controlling sensing time in a memory device
12/28/1999US6009036 Memory device
12/28/1999US6009035 Semiconductor memory device
12/28/1999US6009031 Supply line controlled sense amplifier
12/28/1999US6009030 Sense amplifier enable signal generating circuit of semiconductor memory devices
12/28/1999US6009020 Semiconductor memory device having dynamic data amplifier circuit capable of reducing power dissipation
12/28/1999US6009018 Differential flash memory cell and method for programming same
12/28/1999US6009016 Nonvolatile memory system semiconductor memory and writing method
12/28/1999US6009015 Program-verify circuit and program-verify method
12/28/1999US6009013 Contactless array configuration for semiconductor memories
12/28/1999US6009010 Static semiconductor memory device having data lines in parallel with power supply lines
12/28/1999US6008850 Moving picture decoding device
12/28/1999US6008674 Semiconductor integrated circuit device with adjustable high voltage detection circuit
12/28/1999US6008668 Semiconductor device and input and output circuits thereof
12/28/1999US6008659 Method of measuring retention performance and imprint degradation of ferroelectric films
12/28/1999US6008085 Design and a novel process for formation of DRAM bit line and capacitor node contacts
12/23/1999WO1999066509A1 Writing and reading method for ferroelectric memory
12/23/1999WO1999066389A1 Power failure mode for a memory controller
12/22/1999EP0965132A1 Precision programming of nonvolatile memory cells
12/22/1999CN1239576A Memory with processing function
12/22/1999CN1239356A Clock controlling method and its control circuit
12/22/1999CN1239306A 同步半导体存储器 A synchronous semiconductor memory
12/21/1999US6006339 Circuit and method for setting the time duration of a write to a memory cell
12/21/1999US6006290 System for performing high speed burst operation in memory device utilizing CAS clock to control and activate /WE and /OE control signals
12/21/1999US6005826 Address signal transition detecting circuit for semiconductor memory device
12/21/1999US6005825 Synchronous semiconductor memory device having wave pipelining control structure and method for outputting data using the same
12/21/1999US6005824 Inherently compensated clocking circuit for dynamic random access memory
12/21/1999US6005822 Bank selectable Y-decoder circuit and method of operation
12/21/1999US6005819 Demand-anticipating power control circuits for integrated circuit devices and methods of operation thereof
12/21/1999US6005818 Dynamic random access memory device with a latching mechanism that permits hidden refresh operations
12/21/1999US6005812 Device and method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing
12/21/1999US6005802 Nonvolatile semiconductor memory device using a bit line potential raised by use of a coupling capacitor between bit lines
12/21/1999US6005801 Reduced leakage DRAM storage unit
12/21/1999US6005800 Magnetic memory array with paired asymmetric memory cells for improved write margin
12/21/1999US6005799 Methods and circuits for single-memory dynamic cell multivalue data storage
12/21/1999US6005798 Magnetoresistance effect device, and magnetoresistance effect type head, memory device, and amplifying device using the same
12/21/1999US6005797 Latch-up prevention for memory cells
12/21/1999US6005796 Single ended simpler dual port memory cell
12/21/1999US6005794 Static memory with low power write port
12/21/1999US6005793 Multiple-bit random-access memory array
12/21/1999US6005791 Optical logic element and optical logic device
12/21/1999US6005592 Image processing apparatus having improved memory access for high speed 3-dimensional image processing
12/21/1999US6005434 Substrate potential generation circuit that can suppress variation of output voltage with respect to change in external power supply voltage and environment temperature
12/21/1999US6004825 Method for making three dimensional ferroelectric memory
12/16/1999DE19824592A1 Memory and recording system of digital data
12/15/1999EP0964520A1 Integrated circuit with off chip drivers
12/15/1999EP0964517A2 Delay locked loop
12/15/1999EP0964405A1 Synchronous semiconductor memory
12/15/1999EP0964404A2 Semiconductor memory with differential bit lines
12/15/1999CN1238561A Semiconductor memory circuit
12/15/1999CN1238531A Integrated circuit with improved off chip drivers