Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2001
09/25/2001US6295620 Memory test facilitation circuit using stored test data repeatedly
09/25/2001US6295588 Memory access controller that converts memory access requests into memory access commands
09/25/2001US6295245 Write data input circuit
09/25/2001US6295244 Semiconductor memory device and data read method thereof
09/25/2001US6295243 Semiconductor device
09/25/2001US6295242 SRAM with current-mode test read data path
09/25/2001US6295241 Dynamic random access memory device
09/25/2001US6295240 Controlling a sense amplifier
09/25/2001US6295238 Semiconductor memory device having a circuit for fast operation
09/25/2001US6295237 Semiconductor memory configuration with a built-in-self-test
09/25/2001US6295236 Semiconductor memory of the random access type with a bus system organized in two planes
09/25/2001US6295235 Redundancy circuit of semiconductor memory
09/25/2001US6295233 Current controlled open-drain output driver
09/25/2001US6295232 Dual-to-single-rail converter for the read out of static storage arrays
09/25/2001US6295231 High-speed cycle clock-synchronous memory device
09/25/2001US6295224 Circuit and method of fabricating a memory cell for a static random access memory
09/25/2001US6295223 Ferroelectric random access memory with a memory with a stable sensing margin
09/25/2001US6295219 Integrated memory
09/25/2001US6295218 Semiconductor device
09/25/2001US6294939 Device and method for data input buffering
09/25/2001US6294404 Semiconductor integrated circuit having function of reducing a power consumption and semiconductor integrated circuit system comprising this semiconductor integrated circuit
09/25/2001US6294393 Reduction of imprint in ferroelectric devices using a depoling technique
09/25/2001US6294294 Implantation mask for producing a memory cell configuration
09/25/2001US6294101 Method of manufacture of a thermoelastic bend actuator ink jet printer
09/25/2001US6293658 Printhead ink supply system
09/20/2001WO2001069607A2 Memory cell, method of formation, and operation
09/20/2001WO2001069606A1 One-shot signal generating circuit
09/20/2001WO2001069605A1 Read-write amplifier for a dram memory cell and dram memory
09/20/2001WO2001069602A2 Ferroelectric memory and method of operating same
09/20/2001US20010023466 Memory device having a programmable register
09/20/2001US20010023096 Semiconductor integrated circuit device having capacitor element
09/20/2001US20010022770 Information storage method, information storage device and recording medium
09/20/2001US20010022753 Circuit and method for timing multi-level non-volatile memories
09/20/2001US20010022751 Redundancy circuit of semiconductor memory
09/20/2001US20010022750 Semiconductor memory device capable of recovering defective bit and a system having the same semiconductor memory device
09/20/2001US20010022749 Decoder circuit
09/20/2001US20010022748 Virtual channel synchronous dynamic random access memory
09/20/2001US20010022747 Semiconductor memory device and redundancy circuit, and method of increasing redundancy efficiency
09/20/2001US20010022745 Delay locked loop for use in semiconductor memory device
09/20/2001US20010022743 Semiconductor integrated circuit device
09/20/2001US20010022742 Reference layer structure in a magnetic storage cell
09/20/2001US20010022741 Ferroelectric memory
09/20/2001US20010022738 Controlling a sense amplifier
09/20/2001US20010022600 Nozzle arrangement that incorporates a reversible actuating mechanism
09/20/2001US20010022528 Bias circuit for series connected decoupling capacitors
09/20/2001US20010022522 Clock generating circuit for compensation of delay difference using closed loop analog synchronous mirror delay structure
09/20/2001US20010022373 Magnetic memory element and magnetic memory using the same
09/20/2001DE10011672A1 Integrierte DRAM-Speicherzelle sowie DRAM-Speicher Integrated DRAM memory cell as well as DRAM memory
09/20/2001DE10010457A1 Integrierter Speicher mit Speicherzellen mit magnetoresistivem Speichereffekt Integrated memory having memory cells with a magnetoresistive memory effect
09/20/2001DE10010456A1 Reference voltage generation device for ferroelectric memory
09/19/2001EP1134811A1 Transistor and semiconductor device
09/19/2001EP1134746A2 Non-volatile semiconductor memory
09/19/2001EP1134745A1 Sense amplifier for a DRAM memory
09/19/2001EP1134744A2 Integrated memory having backplate segments
09/19/2001EP1134743A2 Magneto-resistive device and magneto-resistive effect type storage device
09/19/2001EP1134742A2 Magnetic control device and magnetic component and memory apparatus using the same
09/19/2001EP1133770A1 Zero power sram precharge
09/19/2001EP1133749A1 Capacitive sensing array devices
09/19/2001EP0922285B1 Erase method for page mode multiple bits-per-cell flash eeprom
09/19/2001CN1313603A Data reading out/recording method and driving method of semiconductor memory device
09/18/2001US6292869 System and method for memory scrub during self timed refresh
09/18/2001US6292483 Apparatus and method for generating an index key for a network switch routing table using a programmable hash function
09/18/2001US6292430 Synchronous semiconductor memory device
09/18/2001US6292429 Synchronous semiconductor memory device allowing data to be satisfactorily rewritten therein
09/18/2001US6292426 Semiconductor memory device having an SRAM and a DRAM on a single chip
09/18/2001US6292424 DRAM having a power supply voltage lowering circuit
09/18/2001US6292423 Nonvolatile semiconductor memory
09/18/2001US6292420 Method and device for automatically performing refresh operation in semiconductor memory device
09/18/2001US6292419 Synchronous semiconductor memory device
09/18/2001US6292418 Semiconductor memory device
09/18/2001US6292417 Memory device with reduced bit line pre-charge voltage
09/18/2001US6292416 Apparatus and method of reducing the pre-charge time of bit lines in a random access memory
09/18/2001US6292413 Semiconductor device, semiconductor memory device and semiconductor integrated circuit device
09/18/2001US6292412 Clock control circuit
09/18/2001US6292411 Delay control circuit synchronous with clock signal
09/18/2001US6292410 Apparatus for buffering data strobe signal in high-speed memory device
09/18/2001US6292408 Semiconductor memory device and a semiconductor integrated circuit
09/18/2001US6292404 Semiconductor memory
09/18/2001US6292403 Circuit and method for implementing single-cycle read/write operation(s), and random access memory including the circuit and/or practicing the method
09/18/2001US6292402 Prefetch write driver for a random access memory
09/18/2001US6292398 Method for the in-writing verification of the threshold value in non-volatile memories
09/18/2001US6292397 Nonvolatile memory sensing circuit and techniques thereof
09/18/2001US6292395 Source and drain sensing
09/18/2001US6292390 Semiconductor device
09/18/2001US6292388 Efficient and robust random access memory cell suitable for programmable logic configuration control
09/18/2001US6292387 Selective device coupling
09/18/2001US6292386 Integrated memory having cells of the two-transistor/two-capacitor type
09/18/2001US6292385 Ferroelectric random access memory
09/18/2001US6292383 Redundant memory cell for dynamic random access memories having twisted bit line architectures
09/18/2001US6292040 Internal clock signal generating circuit having function of generating internal clock signals which are multiplication of an external clock signal
09/18/2001US6292021 FPGA structure having main, column and sector reset lines
09/18/2001US6292015 Semiconductor integrated circuit device including logic gate that attains reduction of power consumption and high-speed operation
09/18/2001US6291869 Semiconductor circuit device having hierarchical power supply structure
09/18/2001US6291852 Semiconductor element and semiconductor memory device using the same
09/18/2001US6291836 Method of operating a programmable, non-volatile memory device
09/18/2001US6291335 Locally folded split level bitline wiring
09/18/2001US6291276 Cross coupled thin film transistors and static random access memory cell
09/18/2001US6290861 Method of manufacture of a conductive PTFE bend actuator vented ink jet printer
09/13/2001WO2001067469A1 Magnetic field element having a biasing magnetic layer structure
09/13/2001WO2001067462A1 Interlaced multi-level memory
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