Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008) |
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10/29/2003 | CN1126127C Magnetoresistance effect device, and device using the same |
10/29/2003 | CN1126112C Circuit for resetting output potential of power supply generating postive or negative high voltage |
10/29/2003 | CN1126110C Protocol based memory system for initializing bus interfaces using device identifiers |
10/29/2003 | CN1126109C Memory and semiconductor device |
10/29/2003 | CN1126108C Memory device with data output buffer and control method thereof |
10/29/2003 | CN1126106C Storage integrated circuit and main storage system using same and figure storage system thereof |
10/29/2003 | CN1126105C Write control drive circuit |
10/29/2003 | CN1126104C Low power memory including selective precharge circuit |
10/29/2003 | CN1126103C Fuse circuit and redundant decoder |
10/29/2003 | CN1126010C Internal power source circuit |
10/28/2003 | US6640295 Semiconductor circuit with address translation circuit that enables quick serial access in row or column directions |
10/28/2003 | US6640266 Method and device for performing write operations to synchronous burst memory |
10/28/2003 | US6639870 Address transition detecting circuit |
10/28/2003 | US6639868 SDRAM having data latch circuit for outputting input data in synchronization with a plurality of control signals |
10/28/2003 | US6639866 Very small swing high performance asynchronous CMOS static memory (multi-port register file) with power reducing column multiplexing scheme |
10/28/2003 | US6639862 Semiconductor memory with refresh and method for operating the semiconductor memory |
10/28/2003 | US6639857 Coding cell of nonvolatile ferroelectric memory device and operating method thereof, and column repair circuit of nonvolatile ferroelectric memory device having the coding cell and method for repairing column |
10/28/2003 | US6639855 Semiconductor device having a defect relief function of relieving a failure |
10/28/2003 | US6639854 Redundancy circuit of semiconductor memory device |
10/28/2003 | US6639853 Defect avoidance in an integrated circuit |
10/28/2003 | US6639846 Method and circuit configuration for a memory for reducing parasitic coupling capacitances |
10/28/2003 | US6639841 Double-bit non-volatile memory unit and corresponding data read/write method |
10/28/2003 | US6639837 Non-volatile semiconductor memory device |
10/28/2003 | US6639834 Data register and access method thereof |
10/28/2003 | US6639833 Method and circuit for dynamic reading of a memory cell at low supply voltage and with low output dynamics |
10/28/2003 | US6639832 Quantum magnetic memory |
10/28/2003 | US6639831 Localized MRAM data line and method of operation |
10/28/2003 | US6639830 Magnetic memory device |
10/28/2003 | US6639829 Configuration and method for the low-loss writing of an MRAM |
10/28/2003 | US6639828 Static memory cell having independent data holding voltage |
10/28/2003 | US6639826 Memory cell operation using ramped wordlines |
10/28/2003 | US6639825 Data memory |
10/28/2003 | US6639824 Memory architecture |
10/28/2003 | US6639823 Ferroelectric memory device and method of driving the same |
10/28/2003 | US6639822 Dynamic ram-and semiconductor device |
10/28/2003 | US6639765 Magnetoresistive element and magnetoresistive device using the same |
10/28/2003 | US6639445 Semiconductor integrated circuit |
10/28/2003 | US6639291 Spin dependent tunneling barriers doped with magnetic particles |
10/28/2003 | US6638774 Method of making resistive memory elements with reduced roughness |
10/23/2003 | WO2003088459A2 Low-power driver with energy recovery |
10/23/2003 | WO2003088261A1 System and method for generating a reference voltage based on averaging the voltages of two complementary programmed dual bit reference cells |
10/23/2003 | WO2003088257A1 Embedded electrically programmable read only memory devices |
10/23/2003 | WO2003088255A1 Data storage device and refreshing method for use with such device |
10/23/2003 | WO2003088254A1 Storage device using resistance varying storage element and reference resistance value decision method for the device |
10/23/2003 | WO2003088253A1 Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in mram processing |
10/23/2003 | WO2003088041A1 Methods for storing data in non-volatile memories |
10/23/2003 | WO2003086767A1 Pusher actuation in a printhead chip for an inkjet printhead |
10/23/2003 | WO2003086764A1 Wide format pagewidth inkjet printer |
10/23/2003 | WO2003086763A1 A print assembly for a wide format pagewidth printer |
10/23/2003 | WO2003086762A1 Processing of images for high volume pagewidth printing |
10/23/2003 | WO2002073619A3 System latency levelization for read data |
10/23/2003 | US20030200521 Array-based architecture for molecular electronics |
10/23/2003 | US20030199262 Multi-clock domain data input-processing device having clock-reciving locked loop and clock signal input method thereof |
10/23/2003 | US20030199167 Control of MTJ tunnel area |
10/23/2003 | US20030199104 Material combinations for tunnel junction cap layer, tunnel junction hard mask and tunnel junction stack seed layer in MRAM processing |
10/23/2003 | US20030198121 Semiconductor memory device |
10/23/2003 | US20030198120 Multi-port memory circuit |
10/23/2003 | US20030198119 Simultaneous function dynamic random access memory device technique |
10/23/2003 | US20030198118 Method for reading a structural phase-change memory |
10/23/2003 | US20030198117 Semiconductor memory device equipped with refresh timing signal generator |
10/23/2003 | US20030198116 Semiconductor memory device equipped with control circuit for controlling memory cell array in non-normal operation mode |
10/23/2003 | US20030198115 System and method for quick self-refresh exit with transitional refresh |
10/23/2003 | US20030198114 Proportional to temperature voltage generator |
10/23/2003 | US20030198113 Memory storage device with heating element |
10/23/2003 | US20030198111 6F2 DRAM array with apparatus for stress testing an isolation gate and method |
10/23/2003 | US20030198110 Semiconductor integrated circuit device |
10/23/2003 | US20030198109 Semiconductor memory device with series-connected antifuse-components |
10/23/2003 | US20030198108 Drive circuit and control method |
10/23/2003 | US20030198107 Method of checking the state of a capacitor fuse in which the voltage applied to the capacitor fuse is the same level as voltage applied to memory cells |
10/23/2003 | US20030198099 Refresh circuit having variable restore time according to operating mode of semiconductor memory device and refresh method of the same |
10/23/2003 | US20030198098 Semiconductor memory |
10/23/2003 | US20030198097 Semiconductor memory device having preamplifier with improved data propagation speed |
10/23/2003 | US20030198096 Semiconductor memory device |
10/23/2003 | US20030198094 Multi-port memory cell |
10/23/2003 | US20030198090 Fully hidden refresh dynamic random access memory |
10/23/2003 | US20030198089 Semiconductor storage device |
10/23/2003 | US20030198088 Voltage detection circuit and method for semiconductor memory devices |
10/23/2003 | US20030198085 Semiconductor memory cell and memory array using a breakdown phenomena in an ultra-thin dielectric |
10/23/2003 | US20030198082 Unathorised modification of values stored in flash memory |
10/23/2003 | US20030198081 Thin film magnetic memory device reducing a charging time of a data line in a data read operation |
10/23/2003 | US20030198080 Magnetic random access memory |
10/23/2003 | US20030198079 Memory IC |
10/23/2003 | US20030198078 Sensing method and apparatus for resistance memory device |
10/23/2003 | US20030198077 Semiconductor device and method for driving the same |
10/23/2003 | US20030198076 Compact and highly efficient dram cell |
10/23/2003 | US20030198075 Nondestructive sensing mechanism for polarized materials |
10/23/2003 | US20030198072 High speed data bus |
10/23/2003 | US20030197984 Magnetoresistive element and magnetic memory device |
10/23/2003 | US20030197551 Potential generating circuit capable of correctly controlling output potential |
10/23/2003 | US20030197540 Sequential activation delay line circuits and methods |
10/23/2003 | US20030197526 Output buffer circuit |
10/23/2003 | US20030197525 On-chip termination apparatus in semiconductor integrated circuit, and method for controlling the same |
10/23/2003 | US20030197217 Electrically-programmable non-volatile memory cell |
10/23/2003 | US20030197201 Semiconductor device |
10/23/2003 | CA2481492A1 Methods for storing data in non-volatile memories |
10/22/2003 | EP1355357A1 Electrical charge carrier semiconductor device |
10/22/2003 | EP1355318A2 Semiconductor memory |
10/22/2003 | EP1355317A1 Memory refreshing device |
10/22/2003 | EP1355316A1 Data storage device and refreshing method for use with such device |
10/22/2003 | EP1355315A2 Voltage detection circuit and method for semiconductor memory devices |