Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2003
11/05/2003CN1453790A Thin film magnetic memory of shortened data reading data line charging time
11/05/2003CN1127143C Magnetic random memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes
11/04/2003US6643809 Semiconductor device and semiconductor device testing method
11/04/2003US6643805 Memory circuit being capable of compression test
11/04/2003US6643732 Delayed read/write scheme for SRAM interface compatible DRAM
11/04/2003US6643217 Semiconductor memory device permitting early detection of defective test data
11/04/2003US6643216 Asynchronous queuing circuit for DRAM external RAS accesses
11/04/2003US6643215 Synchronous memory devices with synchronized latency control circuits and methods of operating same
11/04/2003US6643214 Semiconductor memory device having write column select gate
11/04/2003US6643213 Write pulse circuit for a magnetic memory
11/04/2003US6643212 Simultaneous function dynamic random access memory device technique
11/04/2003US6643208 Semiconductor integrated circuit device having hierarchical power source arrangement
11/04/2003US6643205 Apparatus and method for refresh and data input device in SRAM having storage capacitor cell
11/04/2003US6643203 Semiconductor memory device including clock-independent sense amplifier
11/04/2003US6643199 Memory with reduced sub-threshold leakage current in dynamic bit lines of read ports
11/04/2003US6643194 Write data masking for higher speed drams
11/04/2003US6643193 Semiconductor device, microcomputer and flash memory
11/04/2003US6643190 Packet command driving type memory device
11/04/2003US6643188 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell
11/04/2003US6643182 Semiconductor device
11/04/2003US6643179 Method and circuit for dynamic reading of a memory cell, in particular a multi-level nonvolatile memory cell
11/04/2003US6643177 Method for improving read margin in a flash memory device
11/04/2003US6643176 Reference current generation circuit for multiple bit flash memory
11/04/2003US6643173 Semiconductor memory device operating in low power supply voltage and low power consumption
11/04/2003US6643170 Method for operating a multi-level memory cell
11/04/2003US6643169 Variable level memory
11/04/2003US6643168 Nonvolatile magnetic storage device
11/04/2003US6643167 Semiconductor memory
11/04/2003US6643164 Method and circuit for determining sense amplifier sensitivity
11/04/2003US6643163 Semiconductor device
11/04/2003US6643162 Ferroelectric memory having a device responsive to current lowering
11/04/2003US6643160 Data bus architecture for integrated circuit devices having embedded dynamic random access memory (DRAM) with a large aspect ratio providing reduced capacitance and power requirements
11/04/2003US6642775 Potential detector and semiconductor integrated circuit
11/04/2003US6642595 Magnetic random access memory with low writing current
11/04/2003US6642588 Latch-up prevention for memory cells
11/04/2003US6642555 Semiconductor memory device
11/04/2003US6642552 Inductive storage capacitor
11/04/2003US6642539 Epitaxial template and barrier for the integration of functional thin film metal oxide heterostructures on silicon
11/04/2003US6642098 DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same
11/04/2003US6641315 Keyboard
11/04/2003US6641255 Ink jet printhead that incorporates through-chip ink flow control
10/2003
10/30/2003WO2003090357A1 Interfaces between semiconductor circuitry and transpinnor-based circuitry
10/30/2003WO2003090231A2 Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
10/30/2003WO2003090229A2 Memory cells enhanced for resistance to single event upset
10/30/2003WO2003038864B1 Magneto-resistive bit structure and method of manufacturing therefor
10/30/2003WO2003028033A3 Segmented metal bitlines
10/30/2003WO2003003472A3 Transistor-arrangement, method for operating a transistor-arrangement as a data storage element and method for producing a transistor-arrangement
10/30/2003US20030204763 Memory controller and method of aligning write data to a memory device
10/30/2003US20030204695 Dual processor apparatus capable of burst concurrent writing of data
10/30/2003US20030204688 Method and apparatus for selectively transmitting command signal and address signal
10/30/2003US20030204674 Synchronous dram with selectable internal prefetch size
10/30/2003US20030204667 Destructive-read random access memory system buffered with destructive-read memory cache
10/30/2003US20030203585 Shared bit line cross-point memory array incorporating P/N junctions and method
10/30/2003US20030203558 Isolating phase change material memory cells
10/30/2003US20030203511 Method of manufacture of ferroelectric memory
10/30/2003US20030203510 Protective layers for MRAM devices
10/30/2003US20030203509 Method of fabricating a self-aligned magnetic tunneling junction and via contact
10/30/2003US20030202416 Semiconductor storing device for reading out or writing data from/in memory cells
10/30/2003US20030202414 Memory circuit with automatic precharge function, and integrated circuit device with automatic internal command function
10/30/2003US20030202413 Semiconductor memory device and control method thereof
10/30/2003US20030202412 Semiconductor memory device with internal data reading timing set precisely
10/30/2003US20030202410 Semiconductor device with self refresh test mode
10/30/2003US20030202409 Semiconductor memory device having test mode and memory system using the same
10/30/2003US20030202407 Memory device having wide margin of data reading operation, for storing data by change in electric resistance value
10/30/2003US20030202406 Compact analog-multiplexed global sense amplifier for RAMs
10/30/2003US20030202401 Single ended row select for a MRAM device
10/30/2003US20030202396 Memory device with multi-level storage cells
10/30/2003US20030202395 Circuit for removing noise form power line and semiconductor memory device having the circuit
10/30/2003US20030202394 Capacitance sensing method of reading a ferroelectric RAM
10/30/2003US20030202393 Semiconductor memory device and control method thereof
10/30/2003US20030202392 Nonvolatile memory and method of programming the same memory
10/30/2003US20030202391 Dummy cell structure for 1T1C FeRAM cell array
10/30/2003US20030202390 Boosted potential generation circuit and control method
10/30/2003US20030202389 Integrated circuit with analog or multilevel storage cells and user-selectable sampling frequency
10/30/2003US20030202387 Flexible redundancy for memories
10/30/2003US20030202386 Redundancy in chained memory architectures
10/30/2003US20030202385 Method for controlling column decoder enable timing in synchronous semiconductor device and apparatus thereof
10/30/2003US20030202384 Transparent continuous refresh RAM cell architecture
10/30/2003US20030202378 Electrically alterable non-volatile memory with n-bits per cell
10/30/2003US20030202377 Flash EEprom system
10/30/2003US20030202375 Magneto resistive storage device having a magnetic field sink layer
10/30/2003US20030202048 Ink jet printing mechanism that incorporates a shape memory alloy
10/30/2003US20030201817 Semiconductor device incorporating internal power supply for compensating for deviation in operating condition and fabrication process conditions
10/30/2003US20030201812 DLL circuit
10/30/2003US20030201803 Low-power driver with energy recovery
10/30/2003US20030201673 Memory device having dual power ports and memory system including the same
10/30/2003DE4345429C2 Semiconductor memory for cache and image processing
10/29/2003EP1357557A1 Systems and methods for reducing noise in mixed-mode integrated circuits
10/29/2003EP1356470A2 Sensing device for a passive matrix memory and a read method for use therewith
10/29/2003EP1356469A2 Mtj mram series-parallel architecture
10/29/2003CN1452773A Semiconductor storage and its refreshing method
10/29/2003CN1452242A Chip terminating device in semiconductor IC and controlling method thereof
10/29/2003CN1452179A Memory with memory component
10/29/2003CN1452178A 半导体存储器件 A semiconductor memory device
10/29/2003CN1452177A 半导体存储器 Semiconductor memory
10/29/2003CN1452175A 磁存储器 Magnetic memory
10/29/2003CN1452174A Magnetic storage device
10/29/2003CN1452114A 半导体存储装置 The semiconductor memory device
10/29/2003CN1126256C Stabilization circuits for multiple digital bits
10/29/2003CN1126166C High density storage structure
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