Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
07/2008
07/29/2008US7404617 Printer assembly with a capping arrangement
07/29/2008CA2347765C Column redundancy circuit with reduced signal path delay
07/24/2008WO2008088994A2 Method and system for improving domain stability in a ferroelectric media
07/24/2008WO2008088710A2 Improved multi-level memory
07/24/2008WO2008088696A2 Cmos sram/rom unified bit cell
07/24/2008WO2008088135A1 Multiple valued dynamic random access memory cell and thereof array using single electron transistor
07/24/2008WO2008087345A2 Multilayer magnetic device, process for the production thereof, magnetic field sensor, magnetic memory and logic gate using such a device
07/24/2008WO2008063741A3 Two-port sram having improved write operation
07/24/2008WO2008045856A3 Concurrent reading of status registers
07/24/2008WO2008011439A3 Compensating for coupling between adjacent storage elements in a nonvolatile memory, based on sensing a neighbour using coupling
07/24/2008WO2008010891A3 Capacitorlbss one-transistor floating-body dram cell and method of forming the same
07/24/2008WO2007124205A3 Mram array with reference cell row and method of operation
07/24/2008US20080177943 Method and system for using dynamic random access memory as cache memory
07/24/2008US20080176750 Systems, devices, and methods for interconnected processor topology
07/24/2008US20080175067 Semiconductor memory device
07/24/2008US20080175065 Method and apparatus for storing page data
07/24/2008US20080175064 Method of programming data in a flash memory device
07/24/2008US20080175063 Nand flash memory device and method of improving characteristic of a cell in the same
07/24/2008US20080175054 Methods and systems for memory devices
07/24/2008US20080175053 Silicon on insulator and thin film transistor bandgap engineered split gate memory
07/24/2008US20080175051 Semiconductor memory
07/24/2008US20080175047 Nonvolatile semiconductor memory device and programming method thereof
07/24/2008US20080175045 Depletion-mode mosfet circuit and applications
07/24/2008US20080175044 Magnetic memory cell and magnetic memory device
07/24/2008US20080175043 Method and apparatus for initializing reference cells of a toggle switched mram device
07/24/2008US20080175042 Phase change layer and method of manufacturing the same and phase change memory device comprising phase change layer and methods of manufacturing and operating phase change memory device
07/24/2008US20080175041 Magnetic memory device, method for writing into magnetic memory device and method for reading magnetic memory device
07/24/2008US20080175040 Semiconductor memory device
07/24/2008US20080175039 Memory cell provided with dual-gate transistors, with independent asymmetric gates
07/24/2008US20080175038 Semiconductor memory device
07/24/2008US20080175037 Method and apparatus for high-efficiency operation of a dynamic random access memory
07/24/2008US20080175036 Resistance random access memory having common source line
07/24/2008US20080175035 Non-volatile resistance changing for advanced memory applications
07/24/2008US20080175034 Ferroelectric memory and operating method of same
07/24/2008US20080175033 Method and system for improving domain stability in a ferroelectric media
07/24/2008US20080175031 Memory cell of a resistive semiconductor memory device, a resistive semiconductor memory device having a three-dimensional stack structure, and related methods
07/24/2008US20080174638 Nozzle Apparatus For An Inkjet Printhead With A Solenoid Piston
07/24/2008US20080174400 Magnetically-and electrically-induced variable resistance materials and method for preparing same
07/24/2008US20080173923 Electronic device including trenches and discontinuous storage elements and processes of forming and using the same
07/24/2008US20080173922 Electronic device including fins and discontinuous storage elements and processes of forming and using the same
07/24/2008US20080173921 Electronic device including trenches and discontinuous storage elements and processes of forming and using the same
07/24/2008US20080173919 Precursors of tetrakis (dialkyl amido) hafnium and tetrakis (dialkyl amido) zirconium; form a dielectric of hafnium oxide and zirconium oxide; conductive top layer of titanium nitride, carbon, tantalum nitride; silicon, aluminium, rare earth metal dopant applied with first precursor; memory device
07/24/2008US20080173916 Semiconductor memory device and write method of the same
07/24/2008DE19960558B4 Halbleiterspeicher vom wahlfreien Zugriffstyp (DRAM) Semiconductor memory of the random access type (DRAM)
07/24/2008DE102007060782A1 Kompensierung für Data Strobe-Zeitgebung Compensation for data strobe timing
07/24/2008DE102004016403B4 Nichtflüchtiger Halbleiterspeicherbaustein sowie zugehörige Betriebs- und Leseverfahren A non-volatile semiconductor memory device and associated operating and reading method
07/23/2008EP1947696A1 Nonvolatile memory device comprising a switching device and a resistant material and method of manufacturing the same
07/23/2008EP1947651A2 Semiconductor memory
07/23/2008EP1947593A1 Portable auxiliary storage device
07/23/2008EP1946323A1 Method for programming of multi-state non-volatile memory using smart verify
07/23/2008EP1946210A2 A method for recovering from errors in flash memory
07/23/2008CN101226990A Oxide heat insulation layer for reducing phase-change memory cell power consumption and implementation method thereof
07/23/2008CN101226989A Transition layer for phase-change memory
07/23/2008CN101226988A Method for reducing CuxO resistance memory write operation current
07/23/2008CN101226987A Phase change layer and method of manufacturing the same and phase change memory device comprising phase change layer and methods of manufacturing and operating phase change memory device
07/23/2008CN101226952A Method and structure of a multi-level cell resistance random access memory with metal oxides
07/23/2008CN101226951A Resistance random access memory
07/23/2008CN101226772A Nonvolatile memory
07/23/2008CN101226771A Multilevel-cell memory structures employing multi-memory layers with tungsten oxides and manufacturing method
07/23/2008CN101226770A Dynamic RAM device with data-handling capacity
07/23/2008CN101226769A Storage element and memory
07/23/2008CN101226768A Method and apparatus for initializing reference cells of a toggle switched MRAM device
07/23/2008CN100405503C Redundant contrl circuit of true programmed prgram unit and semiconductor storage using it
07/23/2008CN100405502C Latch, A/D converter using the same
07/23/2008CN100405501C Ferroelectric storage apparatus, driving method therefor, and driving circuit therefor
07/23/2008CN100405500C Magnetic memory device
07/22/2008US7404029 Accessing device
07/22/2008US7404018 Read latency control circuit
07/22/2008US7403447 Method for stabilizing electronic circuit operation and electronic apparatus using the same
07/22/2008US7403444 Selectable memory word line deactivation
07/22/2008US7403435 Memory unit and semiconductor device
07/22/2008US7403429 Method of erasing data with improving reliability in a nonvolatile semiconductor memory device
07/22/2008US7403427 Method and apparatus for reducing stress in word line driver transistors during erasure
07/22/2008US7403426 Memory with dynamically adjustable supply
07/22/2008US7403425 Programming a flash memory device
07/22/2008US7403424 Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells
07/22/2008US7403421 Noise reduction technique for transistors and small devices utilizing an episodic agitation
07/22/2008US7403419 Integrated DRAM-NVRAM multi-level memory
07/22/2008US7403418 Word line voltage boosting circuit and a memory array incorporating same
07/22/2008US7403416 Integrated DRAM-NVRAM multi-level memory
07/22/2008US7403415 Magnetic memory device
07/22/2008US7403414 Method for measuring hysteresis curve and anisotropic energy of magnetic memory unit
07/22/2008US7403413 Multiple port resistive memory cell
07/22/2008US7403412 Integrated circuit chip with improved array stability
07/22/2008US7403411 Deglitching circuits for a radiation-hardened static random access memory based programmable architecture
07/22/2008US7403410 Switch device and method
07/22/2008US7403408 Semiconductor memory device and semiconductor device
07/22/2008US7402879 Layered magnetic structures having improved surface planarity for bit material deposition
07/22/2008US7402855 Split-channel antifuse array architecture
07/22/2008US7402770 Nano structure electrode design
07/22/2008US7402529 Method of applying cladding material on conductive lines of MRAM devices
07/22/2008US7402455 Manufacturing method of a contact structure and phase change memory cell with elimination of double contacts
07/22/2008US7401902 Inkjet nozzle arrangement incorporating a thermal bend actuator with an ink ejection paddle
07/22/2008US7401901 Inkjet printhead having nozzle plate supported by encapsulated photoresist
07/22/2008US7401900 Inkjet nozzle with long ink supply channel
07/22/2008US7401884 Inkjet printhead with integral nozzle plate
07/22/2008CA2220782C Memory device with charge storage barrier structure
07/17/2008WO2008085255A1 Non-volatile multilevel memory cell programming
07/17/2008WO2008085254A1 Non-volatile multilevel memory cell programming
07/17/2008WO2008016833A3 Increasing write voltage pulse operations in non-volatile memory