Patents
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
10/2014
10/07/2014US8856621 Memory controller for nonvolatile memory device, memory system comprising memory controller, and related methods of operation
10/07/2014US8856603 Method for detecting and correcting errors for a memory whose structure shows dissymmetrical behavior, corresponding memory and its use
10/07/2014US8854916 Semiconductor memory device and access method thereof
10/07/2014US8854911 Memory and method of refreshing a memory
10/07/2014US8854910 Semiconductor memory device and refresh method thereof
10/07/2014US8854909 Semiconductor memory device and method of testing the same
10/07/2014US8854902 Write self timing circuitry for self-timed memory
10/07/2014US8854899 Methods for sensing memory elements in semiconductor devices
10/07/2014US8854896 Nonvolatile semiconductor memory device
10/07/2014US8854893 Flash multiple-pass write with accurate first-pass write
10/07/2014US8854892 Lifetime markers for memory devices
10/07/2014US8854889 Flash memory device and reading method thereof
10/07/2014US8854888 High voltage switching circuitry for a cross-point array
10/07/2014US8854887 Nonvolatile memory device and method of programming the same
10/07/2014US8854886 Memory and program method thereof
10/07/2014US8854885 Apparatus and method for reduced peak power consumption during common operation of multi-nand flash memory devices
10/07/2014US8854884 NAND flash architecture with multi-level row decoding
10/07/2014US8854883 Fusion memory
10/07/2014US8854882 Configuring storage cells
10/07/2014US8854881 Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory
10/07/2014US8854880 Inter-cell interference cancellation in flash memories
10/07/2014US8854879 Method of programming a nonvolatile memory device and nonvolatile memory device performing the method
10/07/2014US8854878 Nonvolatile semiconductor memory device
10/07/2014US8854877 Nonvolatile semiconductor memory device and method of reusing same
10/07/2014US8854876 Perpendicular magnetization storage element and storage device
10/07/2014US8854875 Phase change memory with flexible time-based cell decoding
10/07/2014US8854873 Memory devices, architectures and methods for memory elements having dynamic change in property
10/07/2014US8854872 Drift mitigation for multi-bits phase change memory
10/07/2014US8854871 Dynamic control of spin states in interacting magnetic elements
10/07/2014US8854870 Magnetoresistive random access memory (MRAM) die including an integrated magnetic security structure
10/07/2014US8854869 Semiconductor integrated circuit device and system
10/07/2014US8854868 Sense amplifier
10/07/2014US8854867 Memory device and driving method of the memory device
10/07/2014US8854866 Identification circuit and method for generating an identification bit
10/07/2014US8854865 Semiconductor memory device
10/07/2014US8854864 Nonvolatile memory element and nonvolatile memory device
10/07/2014US8854863 Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells
10/07/2014US8854861 Mixed mode programming for phase change memory
10/07/2014US8854860 Metal-insulator transition latch
10/07/2014US8854859 Programmably reversible resistive device cells using CMOS logic processes
10/07/2014US8854858 Signal level conversion in nonvolatile bitcell array
10/07/2014US8854857 Electronic device and method for FRAM power supply management
10/07/2014US8854856 Methods and apparatus for ROM devices
10/07/2014US8854494 Portable hand-held device having stereoscopic image camera
10/07/2014US8854492 Portable device with image sensors and multi-core processor
10/07/2014US8854084 Sense amplifier and electronic apparatus using the same
10/07/2014US8853791 SRAM memory cell having a dogleg shaped gate electrode structure
10/07/2014US8853659 Switchable electronic device and method of switching said device
10/07/2014US8852761 CoFeSiB/Pt multilayers exhibiting perpendicular magnetic anisotropy
10/07/2014US8852676 Magnetic random access memory (MRAM) with enhanced magnetic stiffness and method of making same
10/02/2014WO2014159396A2 System and method of accessing memory of a data storage device
10/02/2014WO2014159263A1 Determining read voltages for reading memory
10/02/2014WO2014159262A1 Write-assisted memory with enhanced speed
10/02/2014WO2014158956A1 Ferroelectric capacitor with improved fatigue and breakdown properties
10/02/2014WO2014158739A1 Compensation for temperature-dependence of bit line resistance
10/02/2014WO2014158314A1 Improved transistor design for use in advanced nanometer flash memory devices
10/02/2014WO2014158178A1 High stability spintronic memory
10/02/2014WO2014157019A1 Semiconductor device
10/02/2014WO2014156711A1 Semiconductor device
10/02/2014WO2014154497A1 Spin torque magnetic integrated circuit
10/02/2014US20140297929 Non-volatile memory interface
10/02/2014US20140296076 Magnetic memory system and methods in various modes of operation
10/02/2014US20140293727 Semiconductor device outputting read data in synchronization with clock signal
10/02/2014US20140293725 Memory with refresh logic to accomodate low-retention storage rows
10/02/2014US20140293721 Sense amplifier circuit and semiconductor device
10/02/2014US20140293720 Digit line equilibration using access devices at the edge of sub-arrays
10/02/2014US20140293719 Semiconductor memory device with a delay locked loop circuit and a method for controlling an operation thereof
10/02/2014US20140293717 Memory devices and methods for high random transaction rate
10/02/2014US20140293715 SIGNAL MARGIN CENTERING FOR SINGLE-ENDED eDRAM SENSE AMPLIFIER
10/02/2014US20140293686 Semiconductor intergrated circuit and operating method thereof
10/02/2014US20140293685 Magnetic memory
10/02/2014US20140293684 Nonvolatile memory apparatus
10/02/2014US20140293683 Magneto-resistive effect element
10/02/2014US20140293682 Memory bitcell clusters employing localized generation of complementary bitlines to reduce memory area, and related systems and methods
10/02/2014US20140293681 8t sram cell with one word line
10/02/2014US20140293680 Semiconductor memory device for stably reading and writing data
10/02/2014US20140293679 Management of sram initialization
10/02/2014US20140293671 Configurable Width Memory Modules
10/02/2014US20140292389 Locked-loop quiescence apparatus, systems, and methods
10/02/2014DE102005057980B4 Halbleiterschaltung Semiconductor circuit
10/01/2014EP2784020A1 Spin torque magnetic integrated circuit
10/01/2014EP2783367A1 Memory system and method using stacked memory device dice
09/2014
09/30/2014US8850277 Detecting random telegraph noise induced failures in an electronic memory
09/30/2014US8850107 Memory system storing management information and method of controlling same
09/30/2014US8850103 Interruptible NAND flash memory
09/30/2014US8848479 Multiple write during simultaneous memory access of a multi-port memory device
09/30/2014US8848473 Semiconductor device and test method thereof
09/30/2014US8848468 Semiconductor device and control method thereof for permitting the reception of data according to a control signal
09/30/2014US8848464 Semiconductor device and method of driving semiconductor device
09/30/2014US8848463 Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage
09/30/2014US8848460 Semiconductor device having plural data buses and plural buffer circuits connected to data buses
09/30/2014US8848456 Nonvolatile memory device, erasing method thereof, and memory system including the same
09/30/2014US8848455 Nonvolatile memory device and method for manufacturing the same
09/30/2014US8848454 Method for programming non-volatile memory cell, non-volatile memory array and non-volatile memory apparatus
09/30/2014US8848450 Method and apparatus for adjusting maximum verify time in nonvolatile memory device
09/30/2014US8848449 Memory device and method for driving memory device
09/30/2014US8848447 Nonvolatile semiconductor memory device using write pulses with different voltage gradients
09/30/2014US8848445 System and method for minimizing write amplification while maintaining sequential performance using logical group striping in a multi-bank system
09/30/2014US8848442 Multi-bit-per-cell flash memory device with non-bijective mapping
09/30/2014US8848441 Switch and semiconductor device including the switch
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