Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
11/2014
11/04/2014US8879310 Semiconductor storage device
11/04/2014US8879309 Method and apparatus for programming a spin-transfer torque magnetic random access memory (STTMRAM) array
11/04/2014US8879308 Raising programming currents of magnetic tunnel junctions using word line overdrive and high-k metal gate
11/04/2014US8879307 Magnetoresistive device and nonvolatile memory with the same
11/04/2014US8879306 Magnetic memory circuit with stress inducing layer
11/04/2014US8879305 Memory cell
11/04/2014US8879304 Memory circuit and word line control circuit
11/04/2014US8879303 Pre-charge tracking of global read lines in high speed SRAM
11/04/2014US8879302 Management of variable resistance data storage device
11/04/2014US8879301 Method and apparatus for controlling state information retention in an apparatus
11/04/2014US8879300 Switchable two-terminal devices with diffusion/drift species
11/04/2014US8879299 Non-volatile memory cell containing an in-cell resistor
11/04/2014US8879297 Semiconductor device having multi-level wiring structure
11/04/2014US8879296 Memory system and method using stacked memory device dice
11/04/2014US8879294 Selective activation of programming schemes in analog memory cell arrays
11/04/2014US8878860 Accessing memory using multi-tiling
11/04/2014US8878565 Semiconductor device having impedance calibration function to data output buffer and semiconductor module having the same
11/04/2014US8878342 Using alloy electrodes to dope memristors
11/04/2014US8878318 Structure and method for a MRAM device with an oxygen absorbing cap layer
11/04/2014US8878274 Multi-resistive integrated circuit memory
11/04/2014US8878271 Vertical access device and apparatuses having a body connection line, and related method of operating the same
11/04/2014US8878235 Memory cell that employs a selectively fabricated carbon nano-tube reversible resistance-switching element and methods of forming the same
11/04/2014US8878174 Semiconductor element, memory circuit, integrated circuit, and driving method of the integrated circuit
11/04/2014US8878151 Multistate nonvolatile memory elements
11/04/2014US8877627 Method of forming PN floating gate non-volatile storage elements and transistor having N+ gate
11/04/2014US8877522 Method of manufacturing a magnetoresistive-based device with via integration
10/2014
10/30/2014US20140325137 Memory controller and associated signal generating method
10/30/2014US20140325136 Configuration for power reduction in dram
10/30/2014US20140321229 System and method for per-bit de-skew for datamask in a double data-rate memory device interface
10/30/2014US20140321228 Semiconductor device including plural chips stacked to each other
10/30/2014US20140321227 Frequency power manager
10/30/2014US20140321226 Dynamic random access memory and boosted voltage producer therefor
10/30/2014US20140321224 Semiconductor device
10/30/2014US20140321221 Semiconductor integrated circuit with thick gate oxide word line driving circuit
10/30/2014US20140321199 Nano Multilayer Film, Field Effect Tube, Sensor, Random Accessory Memory and Preparation Method
10/30/2014US20140321198 Memory Devices and Related Methods
10/28/2014US8874996 Memory device having reconfigurable refresh timing
10/28/2014US8874994 Systems and methods of storing data
10/28/2014US8874992 Systems and methods to initiate updating of reference voltages
10/28/2014US8873328 Nonvolatile memory device including sudden power off detection circuit and sudden power off detection method thereof
10/28/2014US8873327 Semiconductor device and operating method thereof
10/28/2014US8873326 Memory device
10/28/2014US8873325 Semiconductor device performing refresh operation
10/28/2014US8873313 Semiconductor apparatus
10/28/2014US8873307 Semiconductor device
10/28/2014US8873303 Non-volatile memory and method with shared processing for an aggregate of read/write circuits
10/28/2014US8873302 Common doped region with separate gate control for a logic compatible non-volatile memory cell
10/28/2014US8873300 Semiconductor memory device and method of operating the same
10/28/2014US8873298 Nonvolatile semiconductor storage device
10/28/2014US8873297 Select gate programming in a memory device
10/28/2014US8873295 Memory and operation method thereof
10/28/2014US8873292 Nonvolatile semiconductor memory device
10/28/2014US8873291 Non-volatile memory device with single-polysilicon-layer memory cells
10/28/2014US8873286 Managing non-volatile media
10/28/2014US8873285 Simultaneous multi-level binary search in non-volatile storage
10/28/2014US8873283 Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same
10/28/2014US8873282 Interfaces and die packages, and appartuses including the same
10/28/2014US8873281 Memory element and memory device
10/28/2014US8873280 Spin transfer torque random access memory
10/28/2014US8873279 8T SRAM cell with one word line
10/28/2014US8873278 Volatile memory elements with soft error upset immunity
10/28/2014US8873277 Semiconductor memory device having balancing capacitors
10/28/2014US8873276 Resistive-switching nonvolatile memory elements
10/28/2014US8873274 Resistive memory cells and devices having asymmetrical contacts
10/28/2014US8873273 Semiconductor storage device and test method thereof
10/28/2014US8873272 Semiconductor memory apparatus and test circuit therefor
10/28/2014US8873271 3D architecture for bipolar memory using bipolar access device
10/28/2014US8873270 Pulse generator and ferroelectric memory circuit
10/28/2014US8873268 Circuit and system of using junction diode as program selector for one-time programmable devices
10/28/2014US8872547 Nanomagnetic logic gate and an electronic device
10/28/2014US8872540 Method of sharing in use an impedance matching circuit of a memory circuit to perform an initial calibration and a full time refresh mode calibration, and memory circuit with an impedance matching circuit capable of being used in an initial calibration and a full time refresh mode calibration
10/28/2014US8872277 Sense amplifier structure for a semiconductor integrated circuit device
10/28/2014US8872275 SRAM device having four tunneling transistors connected to a flip-flop
10/28/2014US8872255 Semiconductor devices with non-volatile memory cells
10/28/2014US8872220 Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels
10/28/2014US8871574 Memory cells, memory cell constructions, and memory cell programming methods
10/28/2014US8871365 High thermal stability reference structure with out-of-plane aniotropy to magnetic device applications
10/28/2014US8869436 Resistive switching random access memory structure and method to recreate filament and recover resistance window
10/23/2014US20140317344 Semiconductor device
10/23/2014US20140313821 Fin-type device system and method
10/23/2014US20140313820 Field programming method for magnetic memory devices
10/23/2014US20140313819 System on chip including dual power rail and voltage supply method thereof
10/23/2014US20140313818 Metal-insulator phase transition flip-flop
10/23/2014US20140313817 Sram core cell design with write assist
10/23/2014US20140313810 Switchably coupled digit line segments in a memory device
10/21/2014US8869014 Multi-level signal memory with LDPC and interleaving
10/21/2014US8868829 Memory circuit system and method
10/21/2014US8868821 Systems and methods for pre-equalization and code design for a flash memory
10/21/2014US8867301 Semiconductor device having latency counter to control output timing of data and data processing system including the same
10/21/2014US8867300 Semiconductor memory device, memory system and access method to semiconductor memory device
10/21/2014US8867299 Non-volatile memory device
10/21/2014US8867294 Semiconductor device, refresh control method thereof and computer system
10/21/2014US8867293 Semiconductor memory device changing refresh interval depending on temperature
10/21/2014US8867291 Semiconductor apparatus
10/21/2014US8867282 Semiconductor apparatus with open bit line structure
10/21/2014US8867280 3D stacked NAND flash memory array enabling to operate by LSM and operation method thereof
10/21/2014US8867278 Nonvolatile memory device, memory system including the same, and method of operating nonvolatile memory device
10/21/2014US8867277 Nonvolatile semiconductor memory device
10/21/2014US8867275 Flash memory device and program method
10/21/2014US8867274 Method of operating nonvolatile memory device controlled by controlling coupling resistance value between bit line and page buffer
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