Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/2013
11/14/2013US20130302960 One-Time Programmable Device
11/14/2013US20130302959 Semiconductor Device With Vertical Channel Transistor And Method Of Fabricating The Same
11/14/2013US20130302957 Semiconductor device having super junction metal oxide semiconductor structure and fabrication method for the same
11/14/2013US20130302955 Method for producing a transistor structure with superimposed nanowires and with a surrounding gate
11/14/2013US20130302953 High electron mobility transistor and method of manufacturing the same
11/14/2013US20130302951 Surrounding stacked gate multi-gate fet structure nonvolatile memory device
11/14/2013US20130302950 Inverted thin channel mosfet with self-aligned expanded source/drain
11/14/2013US20130302939 Manufacturing method of tft array substrate
11/14/2013US20130302938 Method for forming wiring, semiconductor device, and method for manufacturing semiconductor device
11/14/2013US20130301975 Hybrid optical modulator
11/14/2013US20130301668 6.1 ANGSTROM III-V and II-VI SEMICONDUCTOR PLATFORM
11/14/2013US20130301356 Semiconductor device with one-time programmable memory cell including anti-fuse with maetal/polycide gate
11/14/2013US20130301350 Vertical Structure Nonvolatile Memory Device
11/14/2013US20130300968 Substrate for liquid crystal display panel and liquid crystal display device
11/14/2013US20130300487 Semiconductor switch
11/14/2013US20130299996 Method of making an electrode contact structure and structure therefor
11/14/2013US20130299954 Composite substrate and method of manufacturing the same
11/14/2013US20130299952 Method for manufacturing a semiconductor device and a semiconductor device
11/14/2013US20130299951 Fin structure
11/14/2013US20130299946 Substrate treating method, stack and semiconductor device
11/14/2013US20130299945 Fabricate self-formed nanometer pore array at wafer scale for dna sequencing
11/14/2013US20130299944 Methods and Apparatus for Bipolar Junction Transistors and Resistors
11/14/2013US20130299942 Capacitor and method for fabricating the same
11/14/2013US20130299938 Isolated zener diode, an integrated circuit incorporating multiple instances of the zener diode, a method of forming the zener diode and a design structure for the zener diode
11/14/2013US20130299937 Method and apparatus for ultra-low contact resistance for semiconductor channel n-fet
11/14/2013US20130299922 Integrated circuit and method for fabricating the same having a replacement gate structure
11/14/2013US20130299921 Method for Protecting a Gate Structure During Contact Formation
11/14/2013US20130299920 Semiconductor device and method for manufacturing the same
11/14/2013US20130299919 MOS Devices with Mask Layers and Methods for Forming the Same
11/14/2013US20130299918 Semiconductor Device and Fabricating Method Thereof
11/14/2013US20130299914 Semiconductor device and method for manufacturing the device
11/14/2013US20130299909 Hybrid plasma-semiconductor electronic and optical devices
11/14/2013US20130299908 Simultaneous formation of finfet and mugfet
11/14/2013US20130299907 Semiconductor device and method of manufacturing the same
11/14/2013US20130299906 Buried-channel field-effect transistors
11/14/2013US20130299904 LDMOS One-Time Programmable Device
11/14/2013US20130299903 Semiconductor device including asymmetric lightly doped drain (ldd) region, related method and design structure
11/14/2013US20130299902 Formation method and structure for a well-controlled metallic source/drain semiconductor device
11/14/2013US20130299901 Trench mosfet structures using three masks process
11/14/2013US20130299900 Superjunction devices having narrow surface layout of terminal structures, buried contact regions and trench gates, and methods of manufacturing the devices
11/14/2013US20130299899 Power Semiconductor Devices and Methods
11/14/2013US20130299898 Power mosfet structure and method
11/14/2013US20130299897 Inverted thin channel mosfet with self-aligned expanded source/drain
11/14/2013US20130299896 Superjunction device
11/14/2013US20130299895 Iii-v compound semiconductor device having dopant layer and method of making the same
11/14/2013US20130299894 Nonvolatile semiconductor memory device and method of manufacturing the same
11/14/2013US20130299893 Memory Cells and Methods of Storing Information
11/14/2013US20130299892 Semiconductor device with sti and method for manufacturing the semiconductor device
11/14/2013US20130299891 Field effect transistors for a flash memory comprising a self-aligned charge storage region
11/14/2013US20130299885 Finfet and method for manufacturing the same
11/14/2013US20130299884 Memory device and method for manufacturing memory device
11/14/2013US20130299883 Printed transistor and fabrication method
11/14/2013US20130299882 Method and system for a gan vertical jfet with self-aligned source metallization
11/14/2013US20130299881 Asymmetric wedge jfet, related method and design structure
11/14/2013US20130299879 Sige hbt device and manufacturing method of the same
11/14/2013US20130299878 Transistor Having Elevated Drain Finger Termination
11/14/2013US20130299876 Method For Improving Selectivity Of EPI Process
11/14/2013US20130299875 Semiconductor device and manufacturing method
11/14/2013US20130299873 Method and system for a gan vertical jfet with self-aligned gate metallization
11/14/2013US20130299872 Trench poly esd formation for trench mos and sgt
11/14/2013US20130299871 Lateral transistor on polymer
11/14/2013US20130299849 Silicon carbide semiconductor device and method for producing the same
11/14/2013US20130299846 Group 13 nitride semiconductor device and method of its manufacture
11/14/2013US20130299845 Semiconductor device, semiconductor device module and method of fabricating semiconductor device
11/14/2013US20130299842 Contact Structures for Compound Semiconductor Devices
11/14/2013US20130299840 Schottky barrier diode and manufacturing method thereof
11/14/2013US20130299837 Thin-film semiconductor device and method of manufacturing the same
11/14/2013US20130299836 Illumination apparatus
11/14/2013US20130299835 Semiconductor Device with an Integrated Poly-Diode
11/14/2013US20130299834 Buried channel transistor and method of forming the same
11/14/2013US20130299832 Semiconductor device and method of fabricating the same
11/14/2013US20130299827 Oxide semiconductor film and semiconductor device
11/14/2013US20130299826 Semiconductor device and method for manufacturing the same
11/14/2013US20130299825 Display device having an oxide semiconductor transistor
11/14/2013US20130299824 Semiconductor device
11/14/2013US20130299821 Semiconductor device and method for manufacturing the same
11/14/2013US20130299820 Semiconductor device
11/14/2013US20130299819 Semiconductor device
11/14/2013US20130299818 Semiconductor device and electronic device including the semiconductor device
11/14/2013US20130299817 Thin film transistor array panel
11/14/2013US20130299782 Graphene transistors with self-aligned gates
11/14/2013US20130299780 Simplified devices utilizing novel pn-semiconductor structures
11/14/2013US20130299773 Low voltage nanoscale vacuum electronic devices
11/14/2013US20130299772 Heavily doped semiconductor nanoparticles
11/14/2013US20130299771 Semiconductor Device Including Transistor
11/14/2013US20130298985 Microelectronic structures including cuprous oxide semiconductors and having improved p-n heterojunctions
11/14/2013US20130298984 Passivation of silicon surfaces using intermediate ultra-thin silicon oxide layer and outer passivating dielectric layer
11/14/2013US20130298977 Method of forming an array of nanostructures
11/14/2013US20130298963 Lateral photovoltaic device for near field use
11/14/2013US20130298823 Gallium-Nitride-On-Diamond Wafers and Manufacturing Equipment and Methods of Manufacture
11/14/2013US20130298699 Separation mode capacitors for sensors
11/14/2013DE19800574B4 Mikromechanisches Bauelement Micromechanical component
11/14/2013DE112012000717T5 Halbleitereinheit, die Bereiche mit hohen Feldern beinhaltet, sowie zugehöriges Verfahren Semiconductor unit, which includes areas with high fields, and associated method
11/14/2013DE112011104880T5 Verfahren zur Herstellung einer Halbleitervorrichtung A process for producing a semiconductor device
11/14/2013DE102013208317A1 Verfahren zum Ausbilden einer Leitung, Halbleitervorrichtung und Verfahren zum Herstellen einer Halbleitervorrichtung A method for forming a line, the semiconductor device and method of manufacturing a semiconductor device
11/14/2013DE102013103966A1 Kontaktstrukturen für Verbindungshalbleitervorrichtungen Contact structures for compound semiconductor devices
11/14/2013DE102013007685A1 Siliziumkarbid-halbleiterbauelement und verfahren zu dessen herstellung Silicon carbide semiconductor device and process for its preparation
11/14/2013DE102012108666B3 Vorrichtung und Verfahren für ein Carbon Nanotube-Interconnect mit niedrigem Übergangswiderstand Apparatus and method for a carbon nanotube interconnect with low contact resistance
11/14/2013DE102004048238B4 Feldeffekttransistor mit geknicktem oder gebogenem Gatebereich in einer Fuselatch-Schaltung Field-effect transistor with kinked or bent gate area in a Fuselatch circuit
11/13/2013EP2662897A1 Method for manufacturing semiconductor device
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