Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/2001
11/22/2001DE10032414C1 Field effect transistor used as a MOSFET comprises a nanowire, and nanotubes applied to the wire and having an electrically insulating region and a semiconducting region or a metallic region
11/22/2001DE10024266A1 Micromechanical component used as a pressure sensor comprises a semiconductor functional layer on a substrate, a hollow chamber arranged between the substrate and the functional layer, and distance spacers arranged on the substrate
11/22/2001DE10023956A1 Power semiconductor component with reduced surface field (RESURF) region between HV and LV sides
11/22/2001CA2404925A1 Method and device for the noninvasive determination of hemoglobin and hematocrit
11/21/2001EP1156533A1 Peripheral structure for a vertical component
11/21/2001EP1156532A2 Electrode contact section of semiconductor device
11/21/2001EP1156530A2 Compound semiconductor switching device for high frequency switching
11/21/2001EP1156517A1 Method for forming tungsten silicide film and method for fabricating metal-insulator-semiconductor transistor
11/21/2001EP1156510A2 Ion implanter and its use for manufacturing a MOSFET
11/21/2001EP1155460A1 Quantum well thermoelectric material on very thin substrate
11/21/2001EP1155459A1 Depletion type mos transistor
11/21/2001EP1155458A1 Field effect transistor arrangement with a trench gate electrode and an additional highly doped layer in the body region
11/21/2001EP1155457A1 Bi-directional esd diode structure
11/21/2001EP1155456A1 Improved esd diode structure
11/21/2001EP1155444A1 Process for forming thin dielectric layers in semiconductor devices
11/21/2001EP1155441A1 Passivated silicon carbide devices with low leakage current and method of fabricating
11/21/2001EP1155096A1 Fluorene copolymers and devices made therefrom
11/21/2001EP0812475B1 Method of manufacturing a semiconductor device comprising a silicon body with bipolar and MOS transistors
11/21/2001EP0789387B1 Laminate and process for forming ohmic electrode
11/21/2001EP0723704B1 Layout for radio frequency power transistors
11/21/2001EP0721658B1 Counter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pockets
11/21/2001CN1323446A Low temperature formation of backside ohmic contacts of vertical devices
11/21/2001CN1323063A Method for producing semiconductor integrated circuit device
11/21/2001CN1323059A Method for producing semiconductor device and semiconductor device
11/21/2001CN1323058A Semiconductor chip and its producing method
11/21/2001CN1323056A Semiconductor substrate and its producing method
11/21/2001CN1322956A Method for producing acceleration test components
11/21/2001CN1322863A Electroplating apparatus
11/21/2001CN1075246C Semiconductor device and its producing method
11/21/2001CN1075201C Liquid crystal display device and method of fabricating the same
11/20/2001US6321364 Method for designing integrated circuit device based on maximum load capacity
11/20/2001US6321183 Semiconductor device characteristic simulation apparatus and its method
11/20/2001US6320784 Memory cell and method for programming thereof
11/20/2001US6320636 TFT-LCD having pixel electrode overlapping scan and data lines except at the intersection of lines
11/20/2001US6320568 Control system for display panels
11/20/2001US6320476 Millimeter-band semiconductor switching circuit
11/20/2001US6320474 MOS-type capacitor and integrated circuit VCO using same
11/20/2001US6320447 Circuit configuration with single-electron components, and operating method
11/20/2001US6320428 Semiconductor integrated circuit device
11/20/2001US6320265 Semiconductor device with high-temperature ohmic contact and method of forming the same
11/20/2001US6320238 Gate structure for integrated circuit fabrication
11/20/2001US6320237 Decoupling capacitor structure
11/20/2001US6320227 Semiconductor memory device and method for fabricating the same
11/20/2001US6320226 LCD with increased pixel opening sizes
11/20/2001US6320225 SOI CMOS body contact through gate, self-aligned to source- drain diffusions
11/20/2001US6320224 Method for producing a semiconductor integrated circuit including a thin film transistor and a capacitor
11/20/2001US6320223 Electronic device comprising a trench gate field effect device
11/20/2001US6320222 Structure and method for reducing threshold voltage variations due to dopant fluctuations
11/20/2001US6320221 TFT-LCD having a vertical thin film transistor
11/20/2001US6320220 Quantum tunneling effect device and semiconductor composite substrate
11/20/2001US6320217 Semiconductor memory device
11/20/2001US6320216 Memory device with barrier portions having defined capacitance
11/20/2001US6320212 Superlattice fabrication for InAs/GaSb/AISb semiconductor structures
11/20/2001US6320211 Semiconductor device and electronic device by use of the semiconductor
11/20/2001US6320210 Hetero-junction field effect transistor
11/20/2001US6320208 II-VI compound semiconductor device
11/20/2001US6320205 Edge termination for a semiconductor component, a schottky diode having an edge termination, and a method for producing the schottky diode
11/20/2001US6320204 Electro-optical device in which an extending portion of a channel region of a semiconductor layer is connected to a capacitor line and an electronic apparatus including the electro-optical device
11/20/2001US6320202 Bottom-gated thin film transistors comprising germanium in a channel region
11/20/2001US6320200 Sub-nanoscale electronic devices and processes
11/20/2001US6320175 Signal detecting apparatus in a charge coupled device having an angled formed transistor
11/20/2001US6320138 Wiring substrate; for use in reduction in resistance and the occurrence of deformations in thin film
11/20/2001US6320126 Vertical ball grid array integrated circuit package
11/20/2001US6319860 Process for manufacturing semiconductor integrated circuit device including treatment of gas used in the process
11/20/2001US6319857 Method of fabricating stacked N-O-N ultrathin gate dielectric structures
11/20/2001US6319849 Semiconductor device and a process for forming a protective insulating layer thereof
11/20/2001US6319838 Lever arm for a scanning microscope
11/20/2001US6319812 Method of manufacturing a semiconductor device
11/20/2001US6319808 Ohmic contact to semiconductor devices and method of manufacturing the same
11/20/2001US6319806 Integrated circuit wiring and fabricating method thereof
11/20/2001US6319805 Semiconductor device having metal silicide film and manufacturing method thereof
11/20/2001US6319804 Process to separate the doping of polygate and source drain regions in dual gate field effect transistors
11/20/2001US6319801 Method for cleaning a substrate and cleaning solution
11/20/2001US6319799 High mobility heterojunction transistor and method
11/20/2001US6319798 Method for reducing lateral dopant gradient in source/drain extension of MOSFET
11/20/2001US6319790 Process for fabricating semiconductor device with multiple cylindrical capacitor
11/20/2001US6319786 Self-aligned bipolar transistor manufacturing method
11/20/2001US6319783 Process to fabricate a novel source-drain extension
11/20/2001US6319782 Semiconductor device and method of fabricating the same
11/20/2001US6319779 Semiconductor transistor devices and methods for forming semiconductor transistor devices
11/20/2001US6319777 Trench semiconductor device manufacture with a thicker upper insulating layer
11/20/2001US6319774 Method for forming a memory cell
11/20/2001US6319760 Manufacturing method of liquid crystal display having high aperture ratio and high transmittance
11/20/2001US6319757 Adhesion and/or encapsulation of silicon carbide-based semiconductor devices on ceramic substrates
11/20/2001US6319741 Method for fabricating metal interconnections and wiring board having the metal interconnections
11/20/2001US6319738 Two-dimensionally arrayed quantum device fabrication method
11/20/2001US6319734 Method for establishing differential injection conditions in mosfet source/drain regions based on determining the permitted amount of energy contamination with respect to desired junction depth
11/20/2001US6319729 Method for manufacturing an angular rate sensor
11/20/2001US6319607 Purification of functionalized fluorescent nanocrystals
11/20/2001US6319472 Stacked, multilayer, electronically reconfigurable; for the transport and/or analysis of biological materials like nucleic acids, biological pathogens and toxins
11/19/2001CA2343694A1 A method for locally modifying the effective bandgap energy in indium gallium arsenide phosphide (ingaasp) quantum well structures
11/15/2001WO2001086729A1 Variable capacitance capacitor
11/15/2001WO2001086728A1 Anode voltage sensor of a vertical power component and use for protecting against short circuits
11/15/2001WO2001086727A2 Silicon carbide metal-semiconductor field effect transistors and methods of fabricating silicon carbide metal-semiconductor field effect transistors
11/15/2001WO2001086726A1 A semiconductor device
11/15/2001WO2001086725A1 Electronic switching device
11/15/2001WO2001086713A1 High mobility heterojunction transistor and method
11/15/2001WO2001086712A1 Hydrogen implant for buffer zone of punch-through non epi igbt
11/15/2001WO2001086708A2 Amorphous metal oxide gate dielectric structure
11/15/2001WO2001086705A1 Thin film processing method and thin film processing apparatus