H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof

Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/2001
11/27/2001	US6323538 Bipolar transistor and method for fabricating the same
11/27/2001	US6323532 Deep divot mask for enhanced buried-channel PFET performance and reliability
11/27/2001	US6323528 Semiconductor device
11/27/2001	US6323527 Semiconductor device and method for manufacturing the same
11/27/2001	US6323526 Semiconductor integrated circuit
11/27/2001	US6323525 MISFET semiconductor device having relative impurity concentration levels between layers
11/27/2001	US6323524 Semiconductor device having a vertical active region and method of manufacture thereof
11/27/2001	US6323522 Silicon on insulator thick oxide structure and process of manufacture
11/27/2001	US6323521 Thin film transistor with electrodes having compressive and tensile stress
11/27/2001	US6323520 Method for forming channel-region doping profile for semiconductor device
11/27/2001	US6323519 Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process
11/27/2001	US6323518 Insulated gate type semiconductor device and method of manufacturing thereof
11/27/2001	US6323517 Non-volatile memory device with single-layered overwriting transistor
11/27/2001	US6323516 Flash memory device and fabrication method having a high coupling ratio
11/27/2001	US6323515 Non-volatile memory and semiconductor device
11/27/2001	US6323514 Container structure for floating gate memory device and method for forming same
11/27/2001	US6323512 Nonvolatile ferroelectric capacitor and nonvolatile ferroelectric memory
11/27/2001	US6323510 Semiconductor memory device having an array of memory cells including a select transistor and a storage capacitor wiring lines at 45° angles
11/27/2001	US6323509 Power semiconductor device including a free wheeling diode and method of manufacturing for same
11/27/2001	US6323508 Insulated gate semiconductor device and manufacturing method thereof
11/27/2001	US6323506 Self-aligned silicon carbide LMOSFET
11/27/2001	US6323504 Single-electron memory device using an electron-hole coulomb blockade
11/27/2001	US6323414 Heterostructure thermionic coolers
11/27/2001	US6323143 Method for making silicon nitride-oxide ultra-thin gate insulating layers for submicrometer field effect transistors
11/27/2001	US6323115 Method of forming semiconductor integrated circuit device with dual gate CMOS structure
11/27/2001	US6323114 Stacked/composite gate dielectric which incorporates nitrogen at an interface
11/27/2001	US6323107 Process for forming device isolation region
11/27/2001	US6323103 Method for fabricating transistors
11/27/2001	US6323095 Method for reducing junction capacitance using a halo implant photomask
11/27/2001	US6323094 Method to fabricate deep sub-μm CMOSFETs
11/27/2001	US6323090 Semiconductor device with trenched substrate and method
11/27/2001	US6323089 Semiconductor memory array with buried drain lines and processing methods therefor
11/27/2001	US6323088 Dual floating gate programmable read only memory cell structure and method for its fabrication an operation
11/27/2001	US6323086 Flash memory structure using sidewall floating gate having one side thereof surrounded by control gate
11/27/2001	US6323077 Inverse source/drain process using disposable sidewall spacer
11/27/2001	US6323073 Method for forming doped regions on an SOI device
11/27/2001	US6323072 Method for forming semiconductor thin film
11/27/2001	US6323070 Semiconductor device and its manufacturing method
11/27/2001	US6323069 Method of manufacturing a thin film transistor using light irradiation to form impurity regions
11/27/2001	US6323057 Method of producing a thin-film capacitor
11/27/2001	US6323051 Method of manufacturing liquid crystal display
11/27/2001	US6323034 Amorphous TFT process
11/27/2001	US6323030 Methods for generating polynucleotides having desired characteristics by iterative selection and recombination
11/27/2001	US6322736 Method for fabricating molded microstructures on substrates
11/27/2001	US6322713 Nanoscale conductive connectors and method for making same
11/27/2001	US6322598 Semiconductor processing system for processing discrete pieces of substrate to form electronic devices
11/22/2001	WO2001088997A2 Trench-gate semiconductor device and method of making the same
11/22/2001	WO2001088996A1 Field effect transistor and method for producing a field effect transistor
11/22/2001	WO2001088995A1 Charge carrier extracting transistor
11/22/2001	WO2001088994A1 Semiconductor device and method of manufacture thereof
11/22/2001	WO2001088993A2 A METHOD FOR LOCALLY MODIFYING THE EFFECTIVE BANDGAP ENERGY IN INDIUM GALLIUM ARSENIDE PHOSPHIDE (InGaAsP) QUANTUM WELL STRUCTURES
11/22/2001	WO2001088992A2 Semiconductor power component
11/22/2001	WO2001088988A1 Coulomb barrier storage device, comprising a plurality of electron traps, and method for making same
11/22/2001	WO2001088985A2 Uniform bitline strapping of a non-volatile memory cell
11/22/2001	WO2001088984A1 Vertical transistor
11/22/2001	WO2001088980A1 Power transistors for radio frequencies
11/22/2001	WO2001088968A1 Method for processing thin film and apparatus for processing thin film
11/22/2001	WO2001088953A2 A quantum domain relay
11/22/2001	WO2001087151A2 Method and device for the noninvasive determination of hemoglobin and hematocrit
11/22/2001	WO2001035466A3 Field effect transistor with a body zone
11/22/2001	WO2001031711A3 Vertical insulated gate field-effect device and method of making the same
11/22/2001	US20010044925 Circuit design method for designing conductive members with a multilayered structure to have antenna sized of proper values
11/22/2001	US20010044221 Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks
11/22/2001	US20010044215 Causing silicon layer to contact with a gas selected from a group of the air, oxygen and ozone under heated conditions, for causing silylyzation to occur for contaminants to cleave a benzene ring of the contaminant
11/22/2001	US20010044196 Semiconductor device and method for producing the same
11/22/2001	US20010044191 Method for manufacturing semiconductor device
11/22/2001	US20010044187 Method for forming gate electrode of flash memory
11/22/2001	US20010044185 Memory device, manufacturing method thereof and integrated circuit thereof
11/22/2001	US20010044184 Nonvolatile semiconductor memory device and method of manufacturing the same
11/22/2001	US20010044183 Nonvolatile semiconductor device having a memory cells each of which is constituted of a memory transistor and a selection transistor
11/22/2001	US20010044176 Manufacturing process of a high integration density power mos device
11/22/2001	US20010044174 Semiconductor device and method of fabricating the same
11/22/2001	US20010044173 Annealing the fluorine containing layer to drive fluorine from the fluorine containing layer into polycrystalline thin film, incorporating fluorine within the grain boundaries to passivate the grain bounderies without chemical reaction
11/22/2001	US20010044172 Method for fabricating thin film transistor
11/22/2001	US20010044114 Chemically assembled nano-scale circuit elements
11/22/2001	US20010043292 Thin film transistor, liquid crystal display panel, and manufacturing method of thin film transistor
11/22/2001	US20010043114 Voltage boosting circuit including capacitor with reduced parasitic capacitance
11/22/2001	US20010043112 Soi voltage-tolerant body-coupled pass transistor
11/22/2001	US20010042911 Semiconductor device and semiconductor assembly apparatus for semiconductor device
11/22/2001	US20010042900 Bipolar transistor in which impurities are introduced from emitter electrode material to form emitter region
11/22/2001	US20010042894 Transistor having a deposited dual-layer spacer structure
11/22/2001	US20010042892 Semiconductor device having an improved interlayer contact and manufacturing method thereof
11/22/2001	US20010042890 Isolated junction structure and method of manufacture
11/22/2001	US20010042889 Semiconductor device with a halo structure
11/22/2001	US20010042888 Transistor comprising semiconductor substrate, channel region between two source/drain regions, metallic intermediate layer on channel region and forming Schottky diode with substrate, ferroelectric layer on metallic layer, gate electrode
11/22/2001	US20010042886 Depletion type MOS semiconductor device and MOS power IC
11/22/2001	US20010042885 Trenched semiconductor device and method of fabricating the same
11/22/2001	US20010042884 Gated semiconductor assemblies
11/22/2001	US20010042883 Eeprom cell with self-aligned tunneling window
11/22/2001	US20010042882 Method for forming a flash memory cell having contoured floating gate surface
11/22/2001	US20010042879 MOS capacitor with wide voltage and frequency operating ranges
11/22/2001	US20010042873 Mosfet with a thin gate insulating film
11/22/2001	US20010042872 Field-effect transistor and method for manufacturing the field effect transistor
11/22/2001	US20010042870 Power semiconductor and fabrication method
11/22/2001	US20010042867 Monolithic compound semiconductor integrated circuit and method of forming the same
11/22/2001	US20010042863 Semiconductor device and manufacturing method thereof
11/22/2001	US20010042862 Schottky diode
11/22/2001	US20010042859 Semiconductor device with quantum-wave interference layers
11/22/2001	US20010042502 Method of self-assembly silicon quantum dots
11/22/2001	DE10100939A1 Non-volatile semiconductor arrangement used as an EEPROM comprises storage cells for the electrical programming by transferring charges between a charge receiving layer and a semiconductor substrate and arranged in the form a matrix

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