Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2013
01/17/2013US20130017680 Method of improving replacement metal gate fill
01/17/2013US20130017679 Work function adjustment in high-k metal gate electrode structures by selectively removing a barrier layer
01/17/2013US20130017678 Methods of anneal after deposition of gate layers
01/17/2013US20130017677 Method for manufacturing semiconductor device
01/17/2013US20130017676 Deep contacts of integrated electronic devices based on regions implanted through trenches
01/17/2013US20130017675 Method for manufacturing semiconductor device
01/17/2013US20130017674 Cryogenic silicon ion-implantation and recrystallization annealing
01/17/2013US20130017673 Generation of multiple diameter nanowire field effect transistors
01/17/2013US20130017672 Plasma treatment method, plasma treatment apparatus, and semiconductor device manufacturing method
01/17/2013US20130017671 Method for manufacturing semiconductor device
01/17/2013US20130017670 Laser processing method and laser processing apparatus
01/17/2013US20130017669 Manufacturing method of semiconductor device and semiconductor device
01/17/2013US20130017668 Wafer dicing using hybrid split-beam laser scribing process with plasma etch
01/17/2013US20130017667 Semiconductor device and method for making same
01/17/2013US20130017666 Method of forming isolation structure
01/17/2013US20130017665 Methods of forming isolation structure and semiconductor structure
01/17/2013US20130017664 Methods of forming a phase change material
01/17/2013US20130017662 Filler for filling a gap, method of preparing the same and method of manufacturing semiconductor capacitor using the same
01/17/2013US20130017661 Method for fabricating a semiconductor device
01/17/2013US20130017660 Self-aligned source and drain structures and method of manufacturing same
01/17/2013US20130017659 Fabricating method of semiconductor device
01/17/2013US20130017658 Method for Fabricating a MOS Transistor with Reduced Channel Length Variation
01/17/2013US20130017657 Method of manufacturing power device
01/17/2013US20130017656 Method of fabricating a semiconductor device
01/17/2013US20130017655 Devices with nanocrystals and methods of formation
01/17/2013US20130017654 Fabrication method for surrounding gate silicon nanowire transistor with air as spacers
01/17/2013US20130017653 Integrated Antennas in Wafer Level Package
01/17/2013US20130017652 Method of manufacturing a semiconductor device package with a heatsink
01/17/2013US20130017651 Method for manufacturing a semiconductor package
01/17/2013US20130017650 Coating for a microelectronic device, treatment comprising same,and method of managing a thermal profile of a microelectronic die
01/17/2013US20130017649 Packaging for clip-assembled electronic components
01/17/2013US20130017648 Methods of manufacturing thin film transistor devices
01/17/2013US20130017643 Method for fabricating package structure having mems elements
01/17/2013US20130017642 Chemically-sensitive field effect transistor based pixel array with protection diodes
01/17/2013US20130017638 Process for manufacturing buried hetero-structure laser diodes
01/17/2013US20130017635 Techniques of Forming Ohmic Contacts on GaN Light Emitting Diodes
01/17/2013US20130017630 Crystallization apparatus, crystallization method, method of manufacturing thin film transistor and method of manufacturing organic light emitting display apparatus
01/17/2013US20130017629 Methods of manufacturing three-dimensional semiconductor devices
01/17/2013US20130017628 Temperature detecting apparatus, substrate processing apparatus and method of manufacturing semiconductor device
01/17/2013US20130017626 Etching apparatus and method of manufacturing semiconductor device
01/17/2013US20130017625 Semiconductor fabricating device and method for driving the same, and method for fabricating magnetic tunnel junction using the same
01/17/2013US20130016942 Adiabatic Mode-Profile Conversion by Selective Oxidation for Photonic Integrated Circuit
01/17/2013US20130016752 Laser Diode Assembly and Method for Producing a Laser Diode Assembly
01/17/2013US20130016750 Surface Morphology of Non-Polar Gallium Nitride Containing Substrates
01/17/2013US20130016579 Semiconductor device
01/17/2013US20130016570 N-Channel Erasable Programmable Non-Volatile Memory
01/17/2013US20130016557 Semiconductor memory device having a three-dimensional structure
01/17/2013US20130016555 Semiconductor intergrated circuit device, method of manufacturing the same, and method of driving the same
01/17/2013US20130016552 Semiconductor memory device featuring selective data storage in a stacked memory cell structure
01/17/2013US20130016477 Electronic Assembly Including Die on Substrate With Heat Spreader Having an Open Window on the Die
01/17/2013US20130016446 Circuit configurations to reduce snapback of a transient voltage suppressor
01/17/2013US20130015882 Compact and Robust Level Shifter Layout Design
01/17/2013US20130015850 Die-Sized Atomic Magnetometer and Method of Forming the Magnetometer
01/17/2013US20130015592 Bond pad configurations for semiconductor dies
01/17/2013US20130015587 Semiconductor device and test method
01/17/2013US20130015586 De-skewed multi-die packages
01/17/2013US20130015585 Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor layers
01/17/2013US20130015583 Chip Comprising an Integrated Circuit, Fabrication Method and Method for Locally Rendering a Carbonic Layer Conductive
01/17/2013US20130015582 Circuit board, semiconductor device, process for manufacturing circuit board and process for manufacturing semiconductor device
01/17/2013US20130015581 Structure and method for high performance interconnect
01/17/2013US20130015580 Replacement metal gate structure and methods of manufacture
01/17/2013US20130015578 Interconnection and assembly of three-dimensional chip packages
01/17/2013US20130015576 Solder Bump with Inner Core Pillar in Semiconductor Package
01/17/2013US20130015575 Semiconductor Device with Solder Bump Formed on High Topography Plated Cu Pads
01/17/2013US20130015574 Bump i/o contact for semiconductor device
01/17/2013US20130015572 Electronic assembly including an embedded electronic component
01/17/2013US20130015571 Semiconductor Package And Method Of Manufacturing The Same
01/17/2013US20130015570 Stacked semiconductor package and manufacturing method thereof
01/17/2013US20130015569 Semiconductor Device and Method of Forming Substrate With Seated Plane for Mating With Bumped Semiconductor Die
01/17/2013US20130015568 Getter structure with optimized pumping capacity
01/17/2013US20130015567 Semiconductor device and production method for same
01/17/2013US20130015566 Apparatus and methods for quad flat no lead packaging
01/17/2013US20130015564 Semiconductor device and method of manufacturing same
01/17/2013US20130015560 Growth of bulk group-iii nitride crystals after coating them with a group-iii metal and an alkali metal
01/17/2013US20130015559 Semiconductor devices and methods of manufacturing the same
01/17/2013US20130015557 Semiconductor package including an external circuit element
01/17/2013US20130015554 Semiconductor Device and Method for Forming Passive Circuit Elements With Through Silicon Vias to Backside Interconnect Structures
01/17/2013US20130015553 High Voltage Isolation Trench, Its Fabrication Method and MOS Device
01/17/2013US20130015552 Electrical Isolation Of High Defect Density Regions In A Semiconductor Device
01/17/2013US20130015551 Method for fabricating memory device with buried digit lines and buried word lines
01/17/2013US20130015550 Junction barrier schottky diode with enforced upper contact structure and method for robust packaging
01/17/2013US20130015542 Magneto-electronic devices and methods of production
01/17/2013US20130015541 Semiconductor storage device and manufacturing method thereof
01/17/2013US20130015538 Magnetoresistive random access memory and method of making the same
01/17/2013US20130015537 Piezoresistive pressure sensor and process for producing a piezoresistive pressure sensor
01/17/2013US20130015536 Mems with single use valve and method of operation
01/17/2013US20130015534 Three dimensional fet devices having different device widths
01/17/2013US20130015533 Epitaxial process for forming semiconductor devices
01/17/2013US20130015532 Methods of manufacturing gates for preventing shorts between the gates and self-aligned contacts and semiconductor devices having the same
01/17/2013US20130015531 Method of forming polysilicon resistor during replacement metal gate process and semiconductor device having same
01/17/2013US20130015530 Method of forming polysilicon resistor during replacement metal gate process and semiconductor device having same
01/17/2013US20130015529 Semiconductor device structure and method for manufacturing the same
01/17/2013US20130015528 Method and system for forming low contact resistance device
01/17/2013US20130015527 Method of Forming Metal Silicide Regions on a Semiconductor Device
01/17/2013US20130015526 Semiconductor device and method for manufacturing the same
01/17/2013US20130015525 Cmos with dual raised source and drain for nmos and pmos
01/17/2013US20130015524 Semiconductor device having metal gate and manufacturing method thereof
01/17/2013US20130015523 Fabrication of lateral double-diffused metal oxide semiconductor (ldmos) devices
01/17/2013US20130015520 Nonvolatile semiconductor memory device and method of manufacturing the same
01/17/2013US20130015519 Nonvolatile semiconductor memory device and method of manufacturing the same