Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/1993
12/07/1993US5268322 Method of making DRAM having a stacked capacitor
12/07/1993US5268319 Controlled channel doping in electrically programmable read only memory cell
12/07/1993US5268318 Highly compact EPROM and flash EEPROM devices
12/07/1993US5268317 Method of forming shallow junctions in field effect transistors
12/07/1993US5268315 Masking, patterning, etching multilayer structure; overcoating with passivation layer
12/07/1993US5268314 Overcoating wafer with oxide, forming buried collector, emitter
12/07/1993US5268313 Method of manufacturing a semiconductor device having a spacer
12/07/1993US5268312 Method of forming isolated wells in the fabrication of BiCMOS devices
12/07/1993US5268311 Of silicon (mono- or di-)oxide or nitride; doping; annealing an inert gas
12/07/1993US5268310 Method for making a mesa type PIN diode
12/07/1993US5268072 Etching processes for avoiding edge stress in semiconductor chip solder bumps
12/07/1993US5268070 Forming trenches in silicon substrate; using sulfur chloride etching gas
12/07/1993US5268069 Safe method for etching silicon dioxide
12/07/1993US5268067 Wafer clamping method
12/07/1993US5268065 Method for thinning a semiconductor wafer
12/07/1993US5268048 Curing thermoplastic adhesive
12/07/1993US5267853 Curing device
12/07/1993US5267607 Substrate processing apparatus
12/07/1993US5267418 Confined water fixture for holding wafers undergoing chemical-mechanical polishing
12/07/1993CA1324980C Fabrication of devices using phosphorus glasses
12/05/1993CA2096214A1 Positive resist composition
12/02/1993DE4317236A1 Forming structured patterns on semiconductor substrates - by forming chemically-enhanced resist layer and then outer resist layer to protect the first layer from the atmos. after exposure
12/02/1993DE4316266A1 Semiconductor device with linear silicone resin on intermediate insulation - giving level surface, ensuring constant dia. of etched through-holes
12/02/1993DE4217900A1 Arrangement of microwave-transparent pane in hollow waveguide - the pane being glued to part attached to the vacuum chamber
12/01/1993EP0572240A2 Nonvolatile semiconductor memory device
12/01/1993EP0572214A2 Method for fabricating an interconnect structure in an integrated circuit
12/01/1993EP0572213A2 A method of forming a MOSFET structure with planar surface
12/01/1993EP0572212A2 Method to form silicon doped CVD aluminium
12/01/1993EP0572180A1 Wafer probe station having auxiliary chucks
12/01/1993EP0572144A2 Apparatus and method for performing thin film layer thickness metrology by deforming a thin film layer into a reflective condenser
12/01/1993EP0572121A2 Method of making circuit board
12/01/1993EP0572059A1 Ultrasonic adhesion/dehesion monitoring apparatus with acoustic transducer means
12/01/1993EP0572043A1 Integrated circuit package which does not delaminate or crack
12/01/1993EP0571994A2 NPN heterojunction bipolar transistor including antimonide base formed on semi-insulating indium phosphide substrate
12/01/1993EP0571989A2 Positive resist composition
12/01/1993EP0571988A2 Positive resist composition
12/01/1993EP0571976A2 Static RAM with thin film transistor
12/01/1993EP0571950A2 Removal of metal contamination
12/01/1993EP0571949A1 Pb rich perovskites for thin film dielectrics
12/01/1993EP0571948A1 Donor doped perovskites for thin film dielectrics
12/01/1993EP0571929A2 Dummy diffraction mask
12/01/1993EP0571899A1 Radiation-curable mixture and its' use for producing high temperature-resistant relief structures
12/01/1993EP0571814A1 Integrated voltage divider
12/01/1993EP0571756A2 High density, three-dimensional, intercoupled circuit structure
12/01/1993EP0571727A1 Apparatus and method for focussed ion beam deposition by controlling beam parameters
12/01/1993EP0571713A2 Gold thin film vapor growing method
12/01/1993EP0571695A1 High voltage resistor integrated on a semiconductor substrate
12/01/1993EP0571692A1 EPROM cell with a readily scalable down interpoly dielectric
12/01/1993EP0571691A1 Metallization over tungsten plugs
12/01/1993EP0571678A1 Wafer suspension box
12/01/1993EP0571649A1 Dicing-die bonding film and use thereof in a process for producing chips
12/01/1993EP0571632A1 Polycristalline silicon thin film and process for forming it at low temperature
12/01/1993EP0571547A1 Multichip module and integrated circuit substrates having planarized patterned surfaces
12/01/1993EP0332680B1 Process of forming a t-gate metal structure on a substrate
11/1993
11/30/1993US5267214 Shared-sense amplifier control signal generating circuit in dynamic type semiconductor memory device and operating method therefor
11/30/1993US5267209 EEPROM programming method
11/30/1993US5267195 Semiconductor non-volatile memory device
11/30/1993US5267194 Electrically erasable programmable read-only-memory cell with side-wall floating gate
11/30/1993US5267176 Method for placing modules on a carrier
11/30/1993US5267020 Gallium arsenide monolithically integrated sampling head using equivalent time sampling having a bandwidth greater than 100 ghz
11/30/1993US5266895 Probe with contact portion including Au and Cu alloy
11/30/1993US5266892 Method of measuring interface state density distribution in MIS structure
11/30/1993US5266890 Test wafer for diagnosing flaws in an integrated circuit fabrication process that cause A-C defects
11/30/1993US5266889 Wafer probe station with integrated environment control enclosure
11/30/1993US5266842 Charge pump circuit for a substrate voltage generator
11/30/1993US5266835 Semiconductor structure having a barrier layer disposed within openings of a dielectric layer
11/30/1993US5266832 Semiconductor apparatus and method for producing the same
11/30/1993US5266830 Hetero junction bipolar transistor with reduced surface recombination current
11/30/1993US5266826 Semiconductor integrated circuit
11/30/1993US5266824 SOI semiconductor substrate
11/30/1993US5266823 Semiconductor device having film for controlling diffusion of impurity
11/30/1993US5266820 Distributed threshold voltage field effect transistor
11/30/1993US5266819 Self-aligned gallium arsenide/aluminum gallium arsenide collector-up heterojunction bipolar transistors capable of microwave applications and method
11/30/1993US5266816 Polysilicon thin film semiconductor device containing nitrogen
11/30/1993US5266813 Used with field effect transistor or bipolar semiconductor devices
11/30/1993US5266812 Substrate detector with light emitting and receiving elements arranged in a staggered fashion
11/30/1993US5266532 Method for laser-assisted silicon etching using halocarbon ambients
11/30/1993US5266529 Focused ion beam for thin film resistor trim on aluminum nitride substrates
11/30/1993US5266528 Method of dicing semiconductor wafer with diamond and resin blades
11/30/1993US5266527 Conformal wafer chuck for plasma processing having a non-planar surface
11/30/1993US5266526 Method of forming trench buried wiring for semiconductor device
11/30/1993US5266525 Microelectronic interlayer dielectric structure and methods of manufacturing same
11/30/1993US5266524 Method of manufacturing a semiconductor device whereby a layer containing aluminium is deposited on a surface of a semiconductor body
11/30/1993US5266523 Method of forming self-aligned contacts using the local oxidation of silicon
11/30/1993US5266522 Structure and method for corrosion and stress-resistant interconnecting metallurgy
11/30/1993US5266521 Method for forming a planarized composite metal layer in a semiconductor device
11/30/1993US5266520 Electronic packaging with varying height connectors
11/30/1993US5266519 Method for forming a metal conductor in semiconductor device
11/30/1993US5266518 Method of manufacturing a semiconductor body comprising a mesa
11/30/1993US5266517 Method for forming a sealed interface on a semiconductor device
11/30/1993US5266516 Method for making electrical contact through an opening of one micron or less for CMOS technology
11/30/1993US5266515 Fabricating dual gate thin film transistors
11/30/1993US5266514 Method for producing a roughened surface capacitor
11/30/1993US5266512 Method for forming a nested surface capacitor
11/30/1993US5266511 Integrated Circuits
11/30/1993US5266510 High performance sub-micron p-channel transistor with germanium implant
11/30/1993US5266509 Fabrication method for a floating-gate field-effect transistor structure
11/30/1993US5266508 Process for manufacturing semiconductor device
11/30/1993US5266507 Method of fabricating an offset dual gate thin film field effect transistor
11/30/1993US5266505 Image reversal process for self-aligned implants in planar epitaxial-base bipolar transistors
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