Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1993
10/19/1993US5255234 Redundant means of a semiconductor memory device and method thereof
10/19/1993US5255231 Architecture of realizing balance of bit line sense amplifier in DRAM cell array
10/19/1993US5255230 Method and apparatus for testing the continuity of static random access memory cells
10/19/1993US5255229 Dynamic random access memory including stress test circuitry
10/19/1993US5255223 Semiconductor memory device having alternatively operated equalizing and erasing functions
10/19/1993US5255219 Ultraviolet-erasable type nonvolatile semiconductor memory device having asymmetrical field oxide structure
10/19/1993US5255157 Molded semiconductor package
10/19/1993US5255153 Electrostatic chuck and plasma apparatus equipped therewith
10/19/1993US5255146 Electrostatic discharge detection and clamp control circuit
10/19/1993US5255099 Solid state pickup device with strap line in vertical register
10/19/1993US5255089 Portable particle detector assembly
10/19/1993US5255071 Photoreflectance method and apparatus utilizing acousto-optic modulation
10/19/1993US5255070 Method for determining interface properties of semiconductor materials by photoreflectance
10/19/1993US5255051 Small field scanner
10/19/1993US5255050 Projection exposure method
10/19/1993US5254874 High density local interconnect in a semiconductor circuit using metal silicide
10/19/1993US5254873 Trench structure having a germanium silicate region
10/19/1993US5254868 Solidstate image sensor device
10/19/1993US5254867 Laminated insulating film; dielectric constants progresssively increasing; suppression of electric field intensity at lower corner of electrode
10/19/1993US5254866 LDD CMOS with wider oxide sidewall on PMOS than NMOS
10/19/1993US5254865 Semiconductor integrated circuit device employing MOSFETS
10/19/1993US5254864 Semiconductor device
10/19/1993US5254863 Semiconductor device such as a high electron mobility transistor
10/19/1993US5254862 Diamond field-effect transistor with a particular boron distribution profile
10/19/1993US5254833 Brittle material cleavage-cutting apparatus
10/19/1993US5254830 System for removing material from semiconductor wafers using a contained plasma
10/19/1993US5254811 Hybrid microchip bonding article
10/19/1993US5254506 Method for the production of silicon oxynitride film where the nitrogen concentration at the wafer-oxynitride interface is 8 atomic precent or less
10/19/1993US5254505 Process of forming capacitive insulating film
10/19/1993US5254503 Process of making and using micro mask
10/19/1993US5254501 Same-side gated process for encapsulating semiconductor devices
10/19/1993US5254499 Injecting a gaseous titanium organometallic precursor, gaseous ammonia and a carrier gas over positioned, pre-heated wafer; reduces etch rate
10/19/1993US5254498 Opening contact hole larger than intended size; forming oxidation layer until hole diameter reaches target size; etching; embedding metal
10/19/1993US5254497 Spin-on-glass; free field inversion; illumination with ultraviolet radiation to neutralize charges in multilevel structure
10/19/1993US5254496 Semiconductor mixed crystal quantum well device manufacture
10/19/1993US5254495 Minimum lateral width diffusion and bird's beak encroachment
10/19/1993US5254494 Method of manufacturing a semiconductor device having field oxide regions formed through oxidation
10/19/1993US5254492 Method of fabricating an integrated circuit for providing low-noise and high-power microwave operation
10/19/1993US5254491 Method of making a semiconductor device having improved frequency response
10/19/1993US5254490 Forming, selective etching of refracotyr metal silicides and ) nitrides
10/19/1993US5254489 Method of manufacturing semiconductor device by forming first and second oxide films by use of nitridation
10/19/1993US5254488 Easily manufacturable thin film transistor structures
10/19/1993US5254487 Method of manufacturing high and low voltage CMOS transistors on a single chip
10/19/1993US5254486 Self-alignment of emitter and collector regions; no need to etch away oxide mask of base region due to previous patterning step
10/19/1993US5254485 Prevents undesirable effect of native oxide film between substrate and electrode film
10/19/1993US5254484 Method for recrystallization of preamorphized semiconductor surfaces zones
10/19/1993US5254481 Polycrystalline solar cell manufacturing method
10/19/1993US5254480 Process for producing a large area solid state radiation detector
10/19/1993US5254419 Method for dust-proofing in the manufacture of electronic devices and pellicle therefor
10/19/1993US5254417 Reflection mask and electrically charged beam exposing apparatus using the reflection mask
10/19/1993US5254375 Apparatus for controllably separating framed working area from remainder of the membrane
10/19/1993US5254370 Method for forming a silicon carbide film
10/19/1993US5254319 Single crystal pulling apparatus
10/19/1993US5254237 Plasma arc apparatus for producing diamond semiconductor devices
10/19/1993US5254229 Electrified object neutralizing method and neutralizing device
10/19/1993US5254218 Masking layer having narrow isolated spacings and the method for forming said masking layer and the method for forming narrow isolated trenches defined by said masking layer
10/19/1993US5254217 Method for fabricating a semiconductor device having a conductive metal oxide
10/19/1993US5254216 Oxygen scavenging in a plasma reactor
10/19/1993US5254215 Using microwave activated gas
10/19/1993US5254214 Etching corner edges of lands into taper shape with argon plasma
10/19/1993US5254213 Method of forming contact windows
10/19/1993US5254209 Method of making micromechanical components
10/19/1993US5254208 Preheating glass substrate in hydrogen or carbon monoxide, forming amorphous semiconductor layer, heating to crystallize
10/19/1993US5254207 Method of epitaxially growing semiconductor crystal using light as a detector
10/19/1993US5254205 Wafer binding method and apparatus
10/19/1993US5254201 Method of stripping off wafer-protective sheet
10/19/1993US5254191 Method for reducing shrinkage during firing of ceramic bodies
10/19/1993US5254176 Method of cleaning a process tube
10/19/1993US5254172 Rotating furnace tube having a non-rotating slidable work holder for processing semiconductor substrates
10/19/1993US5254171 Bias ECR plasma CVD apparatus comprising susceptor, clamp, and chamber wall heating and cooling means
10/19/1993US5254170 Enhanced vertical thermal reactor system
10/19/1993US5253755 Cushioned cover for disk container
10/19/1993US5253663 Transfer apparatus
10/19/1993US5253415 Method of making an integrated circuit substrate lead assembly
10/19/1993US5253411 Method of securing semi-conductor wafer using retention clip
10/19/1993CA2008024C Production process of single crystals
10/19/1993CA1323410C Damping support structure
10/14/1993WO1993020590A1 Metal-insulator-metal capacitor around via structure
10/14/1993WO1993020587A1 Mos structure for reducing snapback
10/14/1993WO1993020584A1 Process for producing a monocrystalline silicon layer on an embedded dielectric
10/14/1993WO1993020583A1 METHOD AND STRUCTURE FOR SUPPRESSING CHARGE LOSS IN EEPROMs/EPROMs AND INSTABILITIES IN SRAM LOAD RESISTORS
10/14/1993WO1993020582A1 Method of preparing semiconductor with good intrinsic gettering
10/14/1993WO1993020581A1 Semiconductor optical devices and techniques
10/14/1993WO1993020580A1 Device and method for handling objects
10/14/1993WO1993020506A1 Semiconductor floor plan and method for a register renaming circuit
10/14/1993WO1993020482A1 Method for forming a lithographic pattern in a process for manufacturing semiconductor devices
10/14/1993WO1993019857A1 Layered chip structure
10/14/1993DE4312084A1 HV power supply with voltage peak limiting network - coacts with two input lines, with capacitor coupled to one input line, and line between resistor and diode
10/14/1993DE4311705A1 NOR or NAND type mask ROM - has two transistors of high and low threshold respectively, with two impurity atom regions and common impurity atom region, all of opposite conductivity to that of substrate
10/14/1993DE4311484A1 Forming conducting structure on surface of substrate - comprises forming dielectric layer on substrate, forming conducting and protective layers, then removing parts of protective layer
10/14/1993DE4311358A1 Flash EEPROM preventing excessive erasure - injects electrons into floating gate of memory cells during erasure and extracts electrons during programming to force cells to enhancement level determined by set voltage
10/14/1993DE4309542A1 Semiconductor device with improved wire and contact resistance - comprising insulator with recesses and having patterned structure, and electrode intermediate connection
10/14/1993DE4212231A1 Doping with amorphous silicon@ - by gas discharge with addn. of tri:methyl-phosphine to gas, used in prodn. of electrophotographic recording material
10/14/1993DE4210900A1 Verfahren zur Herstellung eines haftfesten Verbundes zwischen Kupferschichten und Keramik A process for the preparation of a firmly adhesive bonding between the copper layers and ceramic
10/14/1993CA2132747A1 Layered chip structure
10/14/1993CA2132005A1 Method for improved lithographic patterning in a semiconductor fabrication process
10/13/1993EP0565473A2 Mask structure and process to repair missing or unwanted phase-shifting elements
10/13/1993EP0565461A2 Method of forming and aligning patterns in deposited overlayers on GaAs
10/13/1993EP0565435A1 Complementary transistor semiconductor device
10/13/1993EP0565414A1 Method of manufacturing heteroepitaxial thin films and electronic devices
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