| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
|---|
| 06/21/1994 | US5323349 Dynamic semiconductor memory device having separate read and write data bases |
| 06/21/1994 | US5323343 DRAM device comprising a stacked type capacitor and a method of manufacturing thereof |
| 06/21/1994 | US5323340 Semiconductor integrated circuit |
| 06/21/1994 | US5323208 Projection exposure apparatus |
| 06/21/1994 | US5323207 Projection exposure apparatus |
| 06/21/1994 | US5323106 Device for testing semiconductor devices |
| 06/21/1994 | US5323063 Buffer circuit |
| 06/21/1994 | US5323060 Multichip module having a stacked chip arrangement |
| 06/21/1994 | US5323059 Vertical current flow semiconductor device utilizing wafer bonding |
| 06/21/1994 | US5323057 Lateral bipolar transistor with insulating trenches |
| 06/21/1994 | US5323056 Bipolar transistor with a particular emitter structure |
| 06/21/1994 | US5323055 Semiconductor device with buried conductor and interconnection layer |
| 06/21/1994 | US5323054 Semiconductor device including integrated injection logic and vertical NPN and PNP transistors |
| 06/21/1994 | US5323053 Semiconductor devices using epitaxial silicides on (111) surfaces etched in (100) silicon substrates |
| 06/21/1994 | US5323051 Semiconductor wafer level package |
| 06/21/1994 | US5323050 Collector arrangement for magnetotransistor |
| 06/21/1994 | US5323049 Semiconductor device with an interconnection layer on surface having a step portion |
| 06/21/1994 | US5323048 MIS type semiconductor ROM programmed by conductive interconnects |
| 06/21/1994 | US5323047 Structure formed by a method of patterning a submicron semiconductor layer |
| 06/21/1994 | US5323045 Semiconductor SRAM with low resistance power line |
| 06/21/1994 | US5323043 CMOS integrated circuit |
| 06/21/1994 | US5323042 Active matrix liquid crystal display having a peripheral driving circuit element |
| 06/21/1994 | US5323039 Non-volatile semiconductor memory and method of manufacturing the same |
| 06/21/1994 | US5323038 Array of finned memory cell capacitors on a semiconductor substrate |
| 06/21/1994 | US5323037 Layered capacitor structure for a dynamic random access memory device |
| 06/21/1994 | US5323035 Interconnection structure for integrated circuits and method for making same |
| 06/21/1994 | US5323034 Charge transfer image pick-up device |
| 06/21/1994 | US5323033 Single chip IC device having gate array or memory with gate array and provided with redundancy capability |
| 06/21/1994 | US5323032 Comprising silicon and silicon-germanium alloy; doped areas |
| 06/21/1994 | US5323031 High speed performance |
| 06/21/1994 | US5323030 Field effect real space transistor |
| 06/21/1994 | US5323023 Epitaxial magnesium oxide as a buffer layer on (111) tetrahedral semiconductors |
| 06/21/1994 | US5323022 Platinum ohmic contact to p-type silicon carbide |
| 06/21/1994 | US5323021 Semiconductor integrated circuit device having diode and bipolar transistor held in contact through oxygen-leakage film with emitter electrode |
| 06/21/1994 | US5323020 High performance MESFET with multiple quantum wells |
| 06/21/1994 | US5323016 Focusing method |
| 06/21/1994 | US5323013 Method of rapid sample handling for laser processing |
| 06/21/1994 | US5323012 Apparatus for positioning a stage |
| 06/21/1994 | US5322988 Etching with chlorofluorocarbon where laser impinges surface; semiconductors, ceramics |
| 06/21/1994 | US5322816 Etching by undercutting through dielectric, substrate layers, depositing an electrical conductive material through the opening and coupling |
| 06/21/1994 | US5322815 Method for producing semiconductor device with multilayer leads |
| 06/21/1994 | US5322814 Multiple-quantum-well semiconductor structures with selective electrical contacts and method of fabrication |
| 06/21/1994 | US5322813 Method of making supersaturated rare earth doped semiconductor layers by chemical vapor deposition |
| 06/21/1994 | US5322812 Improved method of fabricating antifuses in an integrated circuit device and resulting structure |
| 06/21/1994 | US5322810 Preventing the crystal defects by doping at high temperature annealing through silicon nitride film after removing the silicon dioxide film |
| 06/21/1994 | US5322809 Self-aligned silicide process |
| 06/21/1994 | US5322808 Method of fabricating inverted modulation-doped heterostructure |
| 06/21/1994 | US5322807 Method of making thin film transistors including recrystallization and high pressure oxidation |
| 06/21/1994 | US5322806 Method of producing a semiconductor device using electron cyclotron resonance plasma CVD and substrate biasing |
| 06/21/1994 | US5322805 Spinning a doped glass, densifying and diffusion into wafers |
| 06/21/1994 | US5322804 Forming a lateral drift, drain extension by doping with an increased impurity concentration |
| 06/21/1994 | US5322803 Process for the manufacture of a component to limit the programming voltage and to stabilize the voltage incorporated in an electric device with EEPROM memory cells |
| 06/21/1994 | US5322802 Method of fabricating silicon carbide field effect transistor |
| 06/21/1994 | US5322765 Dry developable photoresist compositions and method for use thereof |
| 06/21/1994 | US5322749 Phase shift mask and method of making the same |
| 06/21/1994 | US5322748 Photomask and a method of manufacturing thereof comprising trapezoidal shaped light blockers covered by a transparent layer |
| 06/21/1994 | US5322712 Process for improved quality of CVD copper films |
| 06/21/1994 | US5322710 Pumping vapor generated in reservoir through gas line to vapor deposition chamber; controlling vapor flow |
| 06/21/1994 | US5322674 Contacting with activated carbon, contacting with calcium hydroxide and-or ferric oxide |
| 06/21/1994 | US5322593 Bonding separately formed polyimide layered wiring structures together, removing one base by cutting, forming via holes in exposed polyimide layer |
| 06/21/1994 | US5322590 Plasma-process system with improved end-point detecting scheme |
| 06/21/1994 | US5322589 Preventing the peeling by coating a polycrystalline layer on substrate, scanning an energy beam while vibrating |
| 06/21/1994 | US5322567 Particulate reduction baffle with wafer catcher for chemical-vapor-deposition apparatus |
| 06/21/1994 | US5322565 Method and apparatus for through hole substrate printing |
| 06/21/1994 | US5322446 For use with IC devices |
| 06/21/1994 | US5322207 Method and apparatus for wire bonding semiconductor dice to a leadframe |
| 06/21/1994 | US5322204 Electronic substrate multiple location conductor attachment technology |
| 06/21/1994 | US5322079 Substrate holding apparatus of a simple structure for holding a rotating substrate, and a substrate processing apparatus including the substrate holding apparatus |
| 06/21/1994 | US5321886 Applying conductive lines to integrated circuits |
| 06/21/1994 | CA1330360C Circuit testers |
| 06/17/1994 | CA2111536A1 Collimated deposition apparatus |
| 06/17/1994 | CA2085524A1 Field effect transistor and method for manufacturing the same |
| 06/16/1994 | DE4342047A1 Semiconductor component with silylazide layer among diffusion barriers - improves step coverage characteristic by rendering diffusion barrier layer arrangement more amenable to metallisation |
| 06/16/1994 | DE4341941A1 Bipolar transistor with delta-doped p-type base and drift region - has conduction band gap in weakly doped drift region with conduction path min. suited to preferential injection of lighter electrons |
| 06/16/1994 | DE4325708C1 Prodn. of electrically conducting point made of doped silicon@ - by forming mask with opening on substrate and producing doped silicon@ paint on exposed surface of substrate |
| 06/16/1994 | DE4310205C1 Prodn. of hole structure in silicon substrate - by producing pores in substrate by etching, forming mask on substrate and selectively etching |
| 06/16/1994 | DE4241453A1 Plasma etching of pits in silicon@ - has a non-reactive step between etching phases to protect the pit walls against the next etching action |
| 06/15/1994 | EP0601951A2 Process for improving sheet resistance of a fet device gate |
| 06/15/1994 | EP0601950A2 Method of producing a thin silicon-on-insulator layer |
| 06/15/1994 | EP0601901A1 Etching method for heterostructure of III-V compound material |
| 06/15/1994 | EP0601887A1 Method for forming pattern |
| 06/15/1994 | EP0601868A1 Semiconductor memory devices |
| 06/15/1994 | EP0601823A1 Field effect transistor with integrated schottky diode clamp |
| 06/15/1994 | EP0601788A2 Electrostatic chuck usable in high density plasma |
| 06/15/1994 | EP0601747A2 Nonvolatile memory device and method for manufacturing same |
| 06/15/1994 | EP0601723A2 Integrated circuit fabrication |
| 06/15/1994 | EP0601656A1 Device for the treatment of substrates at low temperature |
| 06/15/1994 | EP0601652A2 Electronic device manufacture using ion implantation |
| 06/15/1994 | EP0601621A1 Three dimensional imaging system |
| 06/15/1994 | EP0601615A1 Method of manufacturing a semiconductor device whereby a semiconductor body is temporarily fastened to a further body for a processing operation |
| 06/15/1994 | EP0601590A2 Semiconductor memory cell |
| 06/15/1994 | EP0601568A1 Charge-coupled device having high charge-transfer efficiency over a broad temperature range |
| 06/15/1994 | EP0601541A2 Compound semiconductor device and method for fabricating the same |
| 06/15/1994 | EP0601532A2 HF vapour selective etching method and apparatus |
| 06/15/1994 | EP0601513A2 Method for forming deposited film |
| 06/15/1994 | EP0601468A1 Process and electromagnetically coupled planar plasma apparatus for etching oxides |
| 06/15/1994 | EP0601461A1 Method and apparatus for servicing silicon deposition chamber using non-reactive gas-filled maintenance enclosure |
| 06/15/1994 | EP0601323A1 Integrated circuit chip composite |
| 06/15/1994 | EP0601298A1 Method for protecting the periphery of a semiconductor wafer during an etching step |
| 06/15/1994 | EP0601093A1 Igbt process and device with platinum lifetime control |