Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/1994
05/11/1994EP0596455A1 Fabrication method for micromechanical element
05/11/1994EP0596453A2 Field programmable gate array
05/11/1994EP0596441A2 Purification of very slightly contaminated air within a clean room
05/11/1994EP0596414A2 Semiconductor integrated circuit device comprising a dielectric isolation structure
05/11/1994EP0596393A1 Method of applying bumps on a semiconductor device and connecting it with a printed circuit board
05/11/1994EP0596364A2 Method of producing semiconductor device having buried contact structure
05/11/1994EP0596294A1 Positive-working radiation-sensitive mixture and recording material produced therewith
05/11/1994EP0596264A1 Semi-conductor device with high breakdown voltage
05/11/1994EP0596253A1 Semiconductor device having multilayered metalization and method of manufacturing the same
05/11/1994EP0596228A1 Oscillatorless substrate bias generator
05/11/1994EP0596061A1 Current mirror with at least one pnp transistor
05/11/1994EP0497907B1 Vapor depostion process for depositing an organo-metallic compound layer on a substrate
05/11/1994EP0417067B1 Energy intensive surface reactions using a cluster beam
05/11/1994DE4337871A1 Thin-film transistor mfr. leaving no impurities in channel regions - performing source and drain ion bombardment and ohmic contact formation prior to gate isolation and photoetching
05/11/1994DE4337675A1 Semiconductor chip package with stepped connecting element surfaces - has wire bonds from chip to upper steps of elements with encapsulation completely enveloping chip on lower steps
05/11/1994DE4310640C1 Thin-film transistor matrix mfg. system - with subsequent indium-tin oxide layer used as mask for etching prior metallisation mark
05/11/1994DE4237767A1 Cleaning of particulate-contaminated surfaces e.g. of masks or wafers for semiconductor device mfr. - exploits pressure gradient set up over length of workpiece by flow of gas through ducts along its opposite faces
05/11/1994DE4236300A1 Fast-switching semiconductor junction device mfr. by double diffusion - by partial or total dissociation of iron-gold complexes during tempering at e.g. 300 deg.C to shorten carrier lifetime
05/11/1994DE3522168C2 Verfahren zum Masseverbinden von planaren Bauelementen und integrierten Schaltkreisen A method for mass joining of planar devices and integrated circuits
05/11/1994CN1086631A Substrate for thick-film circuit and its manufacturing method
05/11/1994CA2148813A1 System for compiling algorithmic language source code into hardware
05/11/1994CA2148122A1 Improved laser pattern generation apparatus
05/11/1994CA2148121A1 Rasterizer for a pattern generation apparatus
05/11/1994CA2145879A1 Process for fabricating layered superlattice materials and making electronic devices including same
05/11/1994CA2145878A1 Precursors and processes for making metal oxides
05/10/1994US5311476 Semiconductor memory, components and layout arrangements thereof, and method of testing the memory
05/10/1994US5311465 Semiconductor memory device that uses a negative differential resistance
05/10/1994US5311464 Semiconductor memory cell farming a ROM cell from a RAM cell
05/10/1994US5311463 Semiconductor memory device and manufacturing method thereof
05/10/1994US5311404 Electrical interconnection substrate with both wire bond and solder contacts
05/10/1994US5311403 Printed substrate for mounting high-power semiconductor chip thereon and driver component making use of the printed substrate
05/10/1994US5311402 Semiconductor device package having locating mechanism for properly positioning semiconductor device within package
05/10/1994US5311401 Stacked chip assembly and manufacturing method therefor
05/10/1994US5311391 Electrostatic discharge protection circuit with dynamic triggering
05/10/1994US5311282 High precision stepping aligner having a spiral stepping pattern
05/10/1994US5311275 Apparatus and method for detecting particles on a substrate
05/10/1994US5311250 Pellicle mounting apparatus
05/10/1994US5311156 High frequency double pole double throw switch
05/10/1994US5311080 Field programmable gate array with direct input/output connection
05/10/1994US5311078 Logic circuit and semiconductor device
05/10/1994US5311074 Semiconductor integrated circuit device with crosstalk prevention
05/10/1994US5311073 High voltage CMOS circuit with NAND configured logic gates and a reduced number of N-MOS transistors requiring drain extension
05/10/1994US5311059 Semiconductor device package
05/10/1994US5311055 Trenched bipolar transistor structures
05/10/1994US5311054 Graded collector for inductive loads
05/10/1994US5311052 Planar semiconductor component with stepped channel stopper electrode
05/10/1994US5311051 Field effect transistor with offset region
05/10/1994US5311050 Semiconductor vertical MOSFET inverter circuit
05/10/1994US5311049 High speed writing and erasing
05/10/1994US5311048 Semiconductor integrated circuit device
05/10/1994US5311046 Long wavelength transmitter opto-electronic integrated circuit
05/10/1994US5311045 Field effect devices with ultra-short gates
05/10/1994US5311043 Bidirectional semiconductor switch with hybrid construction
05/10/1994US5311042 Low voltage monolithic protection diode with a low capacitance
05/10/1994US5311041 Thin film transistor having an inverted stagger type structure
05/10/1994US5311040 Thin film transistor with nitrogen concentration gradient
05/10/1994US5311036 Superconducting device
05/10/1994US5311028 System and method for producing oscillating magnetic fields in working gaps useful for irradiating a surface with atomic and molecular ions
05/10/1994US5311026 Charged particle beam lithography system and method therefor
05/10/1994US5310990 Method of laser processing ferroelectric materials
05/10/1994US5310989 Method for laser-assisted etching of III-V and II-VI semiconductor compounds using chlorofluorocarbon ambients
05/10/1994US5310986 Laser machining apparatus
05/10/1994US5310967 Applying conductive lines to integrated circuits
05/10/1994US5310966 Wiring boards and manufacturing methods thereof
05/10/1994US5310720 Process for fabricating an integrated circuit device by forming a planarized polysilazane layer and oxidizing to form oxide layer
05/10/1994US5310711 Method of forming doped shallow electrical junctions
05/10/1994US5310703 Method of manufacturing a semiconductor device, in which photoresist on a silicon oxide layer on a semiconductor substrate is stripped using an oxygen plasma afterglow and a biased substrate
05/10/1994US5310702 Method of preventing short-circuiting of bonding wires
05/10/1994US5310701 Supporting a substrate, bonding metal wires to semiconductors and joining to substrate
05/10/1994US5310700 Vapor deposition of insulating and conducting layers, masking and etching
05/10/1994US5310699 Method of manufacturing a bump electrode
05/10/1994US5310698 Thermal decomposition to form a covering and diffusion to dope layers
05/10/1994US5310697 Method for fabricating an AlGaInP semiconductor light emitting device including the step of removing an oxide film by irradiation with plasma beams and an As or P molecular beam
05/10/1994US5310696 Chemical method for the modification of a substrate surface to accomplish heteroepitaxial crystal growth
05/10/1994US5310695 Interconnect structure in semiconductor device and method for making the same
05/10/1994US5310694 Method for forming a transistor device with resistive coupling
05/10/1994US5310693 Forming multilayer integrated circuit semiconductors with silicon and silicon dioxide
05/10/1994US5310692 Semiconductor integrated circuits of multilayer elements with silicon nitride and photoresists layer
05/10/1994US5310691 Method of manufacturing semiconductor device including formation of alignment mark
05/10/1994US5310690 Conductivity masking, doping surfaces, implanting, multilayer semiconductors
05/10/1994US5310689 Method of forming a SIMOX structure
05/10/1994US5310626 Inorganic dielectric, nitride
05/10/1994US5310625 Improved wall angles
05/10/1994US5310602 Self-aligned process for capping copper lines
05/10/1994US5310583 Oxidation to high purity silica; by-product inhibition; dielectrics
05/10/1994US5310457 Phosphoric acid, hydrofluoric acid, nitric acid, selectivity
05/10/1994US5310456 Dry etching method
05/10/1994US5310455 Bonding strength
05/10/1994US5310454 Reactive ion etching; forming mask pattern on silica layer over silicon substrate; etching by mixture of flurocarbon and hydrogen
05/10/1994US5310453 Plasma process method using an electrostatic chuck
05/10/1994US5310451 Method of forming an ultra-uniform silicon-on-insulator layer
05/10/1994US5310446 Single crystal semiconductor films superimposed to form multilayer element, applying energy to melt and cooling
05/10/1994US5310442 Apparatus for applying and removing protective adhesive tape to/from semiconductor wafer surfaces
05/10/1994US5310441 Wafer binding method and apparatus
05/10/1994US5310440 Convection transfer system
05/10/1994US5310428 Solvent stabilization process and method of recovering solvent
05/10/1994US5310339 Heat treatment apparatus having a wafer boat
05/10/1994US5310301 Chip feeder for chip mounter
05/10/1994US5310104 Method and apparatus for cleaving a semiconductor wafer into individual die and providing for low stress die removal
05/10/1994US5310055 Magazine and shipping tray for lead frames