Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2003
10/16/2003WO2003060996A3 Adaptive threshold voltage control with positive body bias for n and p-channel transistors
10/16/2003WO2003060962A3 Electrolyte composition and treatment for electrolytic chemical mechanical polishing
10/16/2003WO2003058679A3 System and method of processing composite substrate within a high throughput reactor
10/16/2003WO2003052798A3 Method for improving electromigration performance of metallization features through multiple depositions of binary alloys
10/16/2003WO2003052790A3 Lens array with a laterally movable optical axis for corpuscular rays
10/16/2003WO2003051765A3 Method of dividing a substrate into a plurality of individual chip parts
10/16/2003WO2003051581A3 Method and apparatus for alignment of carriers, carrier handlers and semiconductor handling equipment
10/16/2003WO2003049177A3 Method and device for encapsulating electronic components while exerting fluid pressure
10/16/2003WO2003046967A3 Method of forming a doped region in a semiconductor body comprising a step of amorphization by irradiation
10/16/2003WO2003044837A3 Ion imlantation method and apparatus
10/16/2003WO2003041122A3 Preconditioning integrated circuit for integrated circuit testing
10/16/2003WO2003040829A3 Maskless printer using photoelectric conversion of a light beam array
10/16/2003WO2003038889A3 Method and apparatus for nitride spacer etch process implementing in situ interferometry endpoint detection and non-interferometry endpoint monitoring
10/16/2003WO2003038858A3 A semiconductor manufacturing apparatus having a built-in inspection apparatus and method therefor
10/16/2003WO2003035945A3 Substrate for epitaxy
10/16/2003WO2003034153A3 Lithographic apparatus and device manufacturing method
10/16/2003WO2003030248A3 Method of mounting an electronic device on a substrate by a laser beam
10/16/2003WO2003029514A3 Method of depositing cvd and ald films onto low-dielectric-constant dielectrics
10/16/2003WO2003028954A3 Vacuum holding device and method for handling fragile objects, and manufacturing method thereof
10/16/2003WO2003025989A3 Formation of self-organized stacked islands for self-aligned contacts
10/16/2003WO2003023817A3 Process for forming semiconductor quantum dots with superior structural and morphological stability
10/16/2003WO2003020449A9 System for removing deposited material from within a semiconductor fabrication device
10/16/2003WO2003019623A3 Trench dmos transistor with embedded trench schottky rectifier
10/16/2003WO2003019619A3 A low-k pre-metal dielectric semiconductor structure
10/16/2003WO2003015136A3 Method and apparatus for vacuum pumping a susceptor shaft
10/16/2003WO2003014000A3 Edge gripping pre-aligner
10/16/2003WO2003009372A3 Low resistivity tantalum nitride/tantalum bilayer stack
10/16/2003WO2003009349A3 Methods and compositions for chemical mechanical polishing substrates covered with at least two dielectric materials
10/16/2003WO2003007343A3 Device for performing surface treatment on semiconductor wafers
10/16/2003WO2003005450A9 Nanoscale wires and related devices
10/16/2003WO2003005443A3 Composite structure with a uniform crystal orientation and the method of controlling the crystal orientation of one such structure
10/16/2003WO2002103782A3 Barrier enhancement process for copper interconnects
10/16/2003WO2002100771A3 Low-temperature patterned wafer bonding with photosensitive benzocylobutene (bcb) and 3d microelectromechanical systems fabrication
10/16/2003WO2002097890A3 Bitline contacts in a memory cell array
10/16/2003WO2002097878A3 Method and apparatus for determining process layer conformality
10/16/2003WO2002095813A3 Differential cleaning for semiconductor wafers with copper circuitry
10/16/2003WO2002095807A3 Silicon fixtures useful for high temperature wafer processing
10/16/2003WO2002095794A3 Semiconductor memory device and method for the production thereof
10/16/2003WO2002095586A3 Hierarchical built-in self-test for system-on-chip design
10/16/2003WO2002095498A3 Lithographic method of manufacturing a device
10/16/2003WO2002086973A3 Nanoelectronic devices and circuits
10/16/2003WO2002080267A3 Contact formation for semiconductor device
10/16/2003WO2002079881A3 Lithography apparatus comprising a mobile lens for producing digital holograms
10/16/2003WO2002073685A3 Multi-layer circuit assembly and process for preparing the same
10/16/2003WO2002073680A3 Method of making layered superlattice material with ultra-thin top layer
10/16/2003WO2002071472A3 Method and structure of in-situ wafer scale polymer stud grid array contact formation
10/16/2003WO2002067302A3 Rhodium-rich oxygen barriers
10/16/2003WO2002059966A8 Planarizers for spin etch planarization of electronic components and methods of use thereof
10/16/2003WO2002029903A3 Silicon-on-insulator (soi) trench photodiode and method of forming same
10/16/2003US20030196181 Analysis method of film thickness distribution and design system of printed circuit board and manufacturing processes
10/16/2003US20030196178 Trough adjusted optical proximity correction for vias
10/16/2003US20030196140 Semiconductor integrated circuit
10/16/2003US20030195728 Method of estimating a lifetime of hot carrier of MOS transistor, and simulation of hot carrier degradation
10/16/2003US20030195712 Inspection condition setting program, inspection device and inspection system
10/16/2003US20030195312 Chemically and electrically stabilized polymer films
10/16/2003US20030194953 Methods, apparatus and slurries for chemical mechanical planarization
10/16/2003US20030194952 Method for planarizing a dielectric layer of a flash memory device
10/16/2003US20030194949 Method for defect reduction
10/16/2003US20030194948 Chemical-mechanical polishing machine for polishing a wafer of material, and an abrasive delivery device fitted to such a machine
10/16/2003US20030194883 Benchtop processing
10/16/2003US20030194882 Multilayer microstructures and laser based method for precision and reduced damage patterning of such structures
10/16/2003US20030194881 Process for manufacturing a semiconductor device
10/16/2003US20030194880 Use of cyclic siloxanes for hardness improvement
10/16/2003US20030194879 Compositions for chemical-mechanical planarization of noble-metal-featured substrates, associated methods, and substrates produced by such methods
10/16/2003US20030194878 Substrate processing apparatus and method
10/16/2003US20030194877 Integrated etch, rinse and dry, and anneal method and system
10/16/2003US20030194876 Method for removing photoresist and etch residues
10/16/2003US20030194875 Method for large-scale fabrication of atomic-scale structures on material surfaces using surface vacancies
10/16/2003US20030194874 Etching method
10/16/2003US20030194872 Copper interconnect with sidewall copper-copper contact between metal and via
10/16/2003US20030194871 Method of stress and damage elimination during formation of isolation device
10/16/2003US20030194870 Method for forming sidewall oxide layer of shallow trench isolation with reduced stress and encroachment
10/16/2003US20030194868 Copper polish slurry for reduced interlayer dielectric erosion and method of using same
10/16/2003US20030194867 Etch process for recessing polysilicon in trench structures
10/16/2003US20030194866 Method and apparatus for monitoring and controlling force applied on workpiece surface during electrochemical mechanical processing
10/16/2003US20030194865 Method of manufacture of programmable conductor memory
10/16/2003US20030194864 Use of a U-groove as an alternative to using a V-groove for protecting silicon against dicing induced damage
10/16/2003US20030194863 Integrated deposition process for copper metallization
10/16/2003US20030194862 Chemical vapor deposition methods, and atomic layer deposition method
10/16/2003US20030194861 Reactive gaseous deposition precursor feed apparatus
10/16/2003US20030194860 Semiconductor device manufacturing method and electronic equipment using same
10/16/2003US20030194859 Method of fabricating contact plug
10/16/2003US20030194858 Method for the formation of diffusion barrier
10/16/2003US20030194857 Method of making a semiconductor device that has copper damascene interconnects with enhanced electromigration reliability
10/16/2003US20030194856 Method for forming a via in a damascene process
10/16/2003US20030194855 Method of manufacturing semiconductor device package
10/16/2003US20030194854 Mask repattern process
10/16/2003US20030194853 Preparation of stack high-K gate dielectrics with nitrided layer
10/16/2003US20030194852 Method of manufacturing a portion of a memory
10/16/2003US20030194851 Methods for transistor gate formation using gate sidewall implantation
10/16/2003US20030194850 Method and apparatus for improved electroplating fill of an aperture
10/16/2003US20030194849 Methods for transistors formation using selective gate implantation
10/16/2003US20030194848 Shallow trench isolation planarized by wet etchback and chemical mechanical polishing
10/16/2003US20030194847 Patterned SOI by formation and annihilation of buried oxide regions during processing
10/16/2003US20030194846 Medium dose simox over a wide BOX thickness range by a multiple implant, multiple anneal process
10/16/2003US20030194844 Stock/transfer vessel for semiconductor substrate and method of manufacturing semiconductor device
10/16/2003US20030194843 Low voltage power MOSFET device and process for its manufacture
10/16/2003US20030194842 Non-volatile memory capable of preventing antenna effect and fabrication thereof
10/16/2003US20030194841 Method for manufacturing semiconductor device
10/16/2003US20030194840 Method of manufacturing semiconductor device with reduced number of process steps for capacitor formation